Kenwood DV-5700 Service Manual page 18

DV-5700/DVF-R9050/R9050-S
Port No.
77~83 R/CrOUT(3~9)
86~88 R/CrOUT(0~2)
116
117
89
90
91 VSYNC/CREFO
92
110
SDRAM Interface Signals
125~131 ADDR(4~10)
133~136
139~143,146~150
153~157,160~166
169~176 15~21,22~29
118
119
120
121
122
8-2 Simplified Block Diagram
Ext. Syncs /
PIXCLK
10
/
RGB/YUV/
/
YCrCb/D1
/
2
DADDR /
SDA
SCL
18
CIRCUIT DESCRIPTION
Port Name I/O
O Red or Cr chrominance output bus.
CCLKO O Chroma output sampling clock.
YCLKO O Luma output sampling clock.
VREFO - Start of active field or frame indicator.
HREFO O Start of active line indicator output.
Vertical sync output. This signal provides the vertical sync
O
function for the outputs.
Horizontal or composite sync output. This signal provides the
H/CSYNCO O
horizontal sync function for the outputs.
FILM O Film mode detector output.
SDRAM address bus. This signal bus is used to address the
-
ADDR(0~3) external SDARM(s) used for field memories.
DATA(0~4)
SDRAM data bus. This signal bus is used to transfer the data
5~9,10~14, -
to and from the external SDRAM(s) used for field memories.
MEMCLKO O SDRAM clock and 2x output sampling clock.
SDRAM write enable. This active low signal should be connected
WEN -
to the WE pin(s) on the SDRAM(s).
SDRAM row address select. This active low signal should be connected
RASN -
to the RAS pin(s) on the SDRAM(s).
SDRAM column address select. This active low signal should be
CASN -
connected to the CAS pin(s) on the SDRAM(s).
BSEL - SDRAM bank select.
PLL/Clock
Generator
Input
Signal
Formatter
Control
Interface and
Registers
Function
Deinterlacer Core with DCDi TM , Motion
Compensation, Film Mode Detection
and Bad Edit Correction
Sync
Sync Out
Generator
10
/ YU V
Output
/
/RGB/
Signal
/
YCrCb
Formatter