Page of 56
MBCS35104
(TGL)
PIN
ASSIGNMENT
CKO
CKSEI
SDIO
BCKI
GND5
A7
m
r-
-«t
o
o
a
©IrtCOQ —
OO
ZfOQOCVIO
<<<><<aai3aaia.a.>
o
TJ
— o
-
o o z
-
z
M ?
e
<3
o n
V
s
1
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o
1
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z
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o
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MBCS35104
(TGL)
PIN
FUNCTION
PIN NAME
I/O
FUNCTION
VDD
+5V
VSS
Ground
Rest
I
System
Rest
MCK
I
Master Clock
CKO
0
32MHz
CKOO-1
0
CLK/2 duty 50% output
CK02
0
CLK/4 duty 50% output
CKSEL
I
Phase Analog Select for CKOO
CKCL
I
CKOO Reset input
XMM
I
for Test mode
XHS2-0
I
for
Test mode
XTMCK
I
for
Test mode
XTRE
I
for
Test mode
XTfE
I
for
Test mode
32

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