Description Of Adopted New Technology; Digital Signal Circuit - Hitachi DV-P250U Service Manual

Description of adopted new technology

Digital signal circuit

Data Flow
The following figure shows the block diagram of digital signal circuit.
D V D R O M
D R I V E
P G 1 1 0 1
The disc data will be read by DVD ROM Drive then pass through I/F gate array (IC1101). The read data will
then be stored in the track buffer by SH MICOM(IC1601). Then the stored data will be read out from the track
buffer in response to the demand by A/V decoder (IC1201) and input in A/V decoder through I/F gate array.
Finally, the A/V decoder will demodulate/decode the data according to their contents and output audio data to
Audio DAC (IC1501~1504), and video data to Video encoder (IC2202)
Reference Clock of each IC
IC
IC1101 I/F GATE ARRAY
IC1601 SH MICOM
IC1602 FLASH MEMORY
IC1603 TRACK BUFFER
IC1201A/V DECODER
Chapter 1
20 MHz X'TAL S H M I C O M
X1601
I / F G A T E A R R A Y
I C 1 1 0 1
27 MHz X'TAL
X2203
20MHz clock generated by SH MICOM
System clock of X1601 20MHz X'TAL, SH
Nil (Control signal is generated by SH MICOM)
Nil (Control signal is generated by SH MICOM)
System clock and video interface clock are input from X2203 27MHz X'TAL.
Audio interface clock is output from 169 pin named DA-XCK.
T R A C K B U F F E R
4Mbit
I C 1 6 0 1
I C 1 6 0 3
SH BUS
A / V D E C O D E R
I C 1 2 0 1
Reference Clock
F L A S H M E M O R Y
8Mbit
I C 1 6 0 2
B U F F E R R A M
1 6 M b i t x 2 S D R A M
I C 2 2 0 3 ~ I C 2 2 0 4
To Audio DAC
To VIDEO ENCODER
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