Pioneer CDJ-350 Service Manual page 27

5
[9] Confirmation of basic operations of the CPU/DSP
First, check if the voltage at each section is OK.
[9-1] Periphery of the MAIN CPU: IC103
No. Cause Diagnostics Point
MAIN Assy
1 —
IC103
[9-2] SERVO DSP: IC201
No. Cause Diagnostics Point
MAIN Assy
1 —
IC201
[9-3] AUDIO DSP: IC301
No. Cause Diagnostics Point
MAIN Assy
—
1
IC301
[9-4] PANEL CPU: IC501
No. Cause Diagnostics Point
MAIN Assy
1 —
IC501
5
6
Item to be Checked
Check the waveforms and levels of the
following signals:
• Reset: MAIN_RST must be "H."
• Clock: Check the waveform of CLK66M.
• Status: Check the waveform of SH_STATUS.
Item to be Checked
Check the waveforms and levels of the
following signals (in CD PLAY mode):
• Reset: SRVRST must be "H."
• Clock: Check the waveform of CLK_S_16M.
• Servo clock: Check the waveform of
SRVSCLK.
Item to be Checked
Check the waveforms and levels of the
following signals (in PLAY mode):
• Data request: DSPDREQ
• Reset: DSPRST must be "H."
• Clock: Check the waveform of CLK_A_16M.
Item to be Checked
Check the waveforms and levels of the
following signals:
• Reset: RESET (IC501, Pin 12) must be "H."
• MAIN communication clock: Check the
waveform of TSCK (IC501, Pin 37).
CDJ-350
6
7
Corrective Action
If the SH_STATUS signal is fixed at "L" or "H," the
Main CPU is not operating.
If both the Reset and Clock signals are OK, IC103
(MAIN CPU), IC101 (FLASH ROM) or IC102
(SDRAM) may be defective.
Corrective Action
If both the Reset and Clock signals are OK, but the
SRVSCLK signal is not output, the SERVO DSP
(IC201) may be defective.
Corrective Action
If both the Reset and Clock signals are OK, but the
DSPDREQ signal is not output, the AUDIO DSP
(IC301) may be defective.
Corrective Action
If the Reset signal is OK, but the TSCK signal is not
output, the PANEL CPU (IC501) may be defective.
7
8
A
Reference
10.11
WAVEFORMS
MAIN 1,4
B
Reference
10.11
WAVEFORMS
MAIN 3,6
Reference
10.11
C
WAVEFORMS
MAIN 5,2
Reference
10.11
WAVEFORMS
MAIN 8
D
E
F
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