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Table 4-3. BIOS Beep Codes
Code
2Fh
30h
32h
33h
36h
38h
3Ah
3Ch
3Dh
42h
45h
46h
48h
49h
4Ah
4Bh
4Ch
4Eh
50h
51h
52h
54h
58h
59h
5Ah
5Bh
5Ch
60h
62h
64h
66h
67h
68h
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4-22
.
Beeps
1-4-1-1
2-1-2-3
2-2-3-1
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POST Routine Description
Enable cache before system BIOS shadow
RAM failure on data bits xxxx of high byte of memory bus
Test CPU bus-clock frequency
Initialize Phoenix Dispatch Manager
Warm start shut down
Shadow system BIOS ROM
Autosize cache
Advanced configuration of chipset registers
Load alternate registers with CMOS values
Initialize interrupt vectors
POST device initialization
Check ROM copyright notice
Check video configuration against CMOS
Initialize PCI bus and devices
Initialize all video adapters in system
QuietBoot start (optional)
Shadow video BIOS ROM
Display BIOS copyright notice
Display CPU type and speed
Initialize EISA board
Test keyboard
Set key click if enabled
Test for unexpected interrupts
Initialize POST display service
Display prompt "Press F2 to enter SETUP"
Disable CPU cache
Test RAM between 512 and 640 KB
Test extended memory
Test extended memory address lines
Jump to User Patch1
Configure advanced cache registers
Initialize Multi Processor APIC
Enable external and CPU caches
Troubleshooting
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