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3 7 63 1515 0
Pin No.
151
DATA1(FLR)
152
153
154
DATA2(SLR)
155
DATA3(CSW)
156
157
158
159
DAI_LRCK
160
161
162
CS(ZIVA_E2P)
163
164
165
WRITE_CTRL(ZIVA_E2P)
166
167
168 to 171
SDDATA7 to SDDATA4
172
173
174 to 177
SDDATA3 to SDDATA0
178
TE
L 13942296513
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
www
202
203
204
.
205
206, 207
208
http://www.xiaoyu163.com
Pin Name
I/O
Audio data (front L/R signal) output to 2CH DAC IC (HCD-RV777D) and D/A
O
converter IC (HCD-RV888D/RV999D).
VDDP
—
Power supply pin (+3.2 V) (I/O signal)
GNDP
—
Ground pin (I/O signal)
O
Audio data (rear L/R signal) output to D/A converter IC (HCD-RV888D/RV999D).
Audio data (center/subwoofer signal) output to D/A converter IC (HCD-RV888D/
O
RV999D).
IEC958
O
S/PDIF signal output
DAI_DATA
I
Not used in this set. (Open)
DAI_BCK
I
Not used in this set. (Open)
I
Not used in this set. (Open)
I2C_CL
I/O
I2C clock bus signal input from/output to mechanism control IC.
I2C_DA
I/O
I2C data bus signal input from/output to mechanism control IC.
O
Chip select signal output to EEPROM IC.
RXD1
I
Serial data input from check jig
TXD1
O
Serial data output to check jig
O
Write control signal output to EEPROM IC.
GNDP
—
Ground pin (I/O signal)
VDDP
—
Power supply pin (+3.2 V) (I/O signal)
I
SDBUS data input from DVD decoder IC.
GND
—
Ground pin (inside core)
VDD
—
Power supply pin (+1.8 V) (inside core)
I
SDBUS data input from DVD decoder IC.
SDREQ
O
SDBUS data request signal output to DVD decoder IC.
SDEN
I
SDBUS data enable signal input from DVD decoder IC.
GNDP
—
Ground pin (I/O signal)
VDDP
—
Power supply pin (+3.2 V) (I/O signal)
SDERROR
I
SDBUS data error signal input from DVD decoder IC.
SDCLK
I
SDBUS data clock signal input from DVD decoder IC.
HIRQ1
I
Interrupt signal input from mechanism control IC.
DRVCLK
I
Serial data clock signal input from mechanism control IC.
DRVTX
I
Serial data input from mechanism control IC and EEPROM IC.
DRVRX
O
Serial data output to mechanism control IC and EEPROM IC.
DRVRDY
I
Ready signal input from mechanism control IC.
VNW
—
Power supply for 5 V tolerance voltage input
ALE
O
Latch enable signal output for address data demux.
RST_SPC
O
Reset signal output to mechanism control IC.
INT/EXT
O
Not used in this set. (Open)
HCS2
O
Not used in this set. (Open)
HCS1
I/O
Not used in this set. (Open)
HCS0
O
Chip select signal output to programmable ROM IC.
VDDP
—
Power supply pin (+3.2 V) (I/O signal)
TRST
I
Reset signal input
TDO
O
Data output
TDI
I
Data input
TMS
I
TMS signal input
TCK
I
TCK signal input
RESET
I
ZIVA reset signal input
x
ao
y
BUS CLK
I/O
Not used in this set. (Open)
GND
—
Ground pin (inside core)
i
VDD
—
Power supply pin (+1.8 V) (inside core)
HA3, HA2
I/O
Address bus signal input from/output to bus interface IC.
GNDP
—
Ground pin (I/O signal)
http://www.xiaoyu163.com
8
Q Q
3
6 7
1 3
u163
.
HCD-RV777D/RV888D/RV999D
2 9
9 4
2 8
Pin Description
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
43
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