Sony MEX-BT5100 Service Manual page 53

IT BOARD IC511 HD6417727F100CV (BLUETOOTH CONTROLLER)
Pin No. Pin Name
1 VCC-RTC
2 XTAL2
3 EXTAL2
4 VSS-RTC
5, 6 MD1, MD2
7 NMI
8 IRQ0
UART_INTA, UART_
9, 10
INTB
11, 12 IRQ3, IRQ4
13 VEPWC
14 VCPWC
15 MD5
16 BREQ
17 BACK
18 VSSQ
19 SD_CLK
20 VCCQ
21 to 28 D31 to D24
29 VSSQ
30 D23
31 VCCQ
32 to 34 D22to D20
35 VSS
36 D19
37 VCC
38 to 40 D18 to D16
41 D15
42 VSSQ
43 D14
44 VCCQ
45 to 50 D13 to D8
51, 52 D7, D6
53 VSSQ
54 D5
55 VCCQ
56 to 60 D4 to D0
61 A0
62 A1
63 A2
64 VSSQ
65 A3
66 VCCQ
67 to 74 A4 to A11
75 VSSQ
76 A12
77 VCCQ
78, 79 A13, A14
80 to 85 A15 to A20
86 VSSQ
87 A21
88 VCCQ
89, 90 A22, A23
91 VSS
92 A24
I/O
- Power supply terminal (+1.9V)
I System clock input terminal for internal real time clock
O System clock output terminal for internal real time clock
- Ground terminal
I Setting terminal for the clock mode
I Non-maskable interrupt input terminal
I Interrupt request signal input terminal
I Interrupt request signal input from the data bus interface
I Interrupt request signal input terminal
O Not used
O Not used
I Setting terminal for the endian
I Bus request signal input terminal
O Bus acknowledge signal output terminal
- Ground terminal
O Serial data transfer clock signal output to the data bus interface
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+1.9V)
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM and fl ash ROM
- Ground terminal
I/O Two-way data bus with the SD-RAM and fl ash ROM
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM and fl ash ROM
I/O Two-way data bus with the SD-RAM, fl ash ROM and data bus interface
- Ground terminal
I/O Two-way data bus with the SD-RAM, fl ash ROM and data bus interface
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM, fl ash ROM and data bus interface
O Address signal output to the data bus interface
O Address signal output to the fl ash ROM and data bus interface
O Address signal output to the SD-RAM, fl ash ROM and data bus interface
- Ground terminal
O Address signal output to the SD-RAM and fl ash ROM
- Power supply terminal (+3.3V)
O Address signal output to the SD-RAM and fl ash ROM
- Ground terminal
O Address signal output to the SD-RAM and fl ash ROM
- Power supply terminal (+3.3V)
O Address signal output to the SD-RAM and fl ash ROM
O Address signal output to the fl ash ROM
- Ground terminal
O Address signal output to the fl ash ROM
- Power supply terminal (+3.3V)
O Address signal output terminal
- Ground terminal
O Address signal output terminal
Description
Not used
Not used
Fixed at "H" in this set
Not used
Not used
Not used
Not used
Not used
Not used
MEX-BT5100
53