Figure 3-34. Display Circuit Detail Overview Block Diagram - Motorola APX 1000 Detailed Service Manual

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Table of Contents

3.2.6.2 APX 2000/ APX 4000/ APX 4000Li/ APX 1000 (900 MHz) LCD Display Modules

3.2.6.2.1 QVGA

The main Transflective 1.6" color display is a QVGA (160 x RGB x 90) active matrix TFT (Thin Film

Transistor) LCD. A display flex connects the main display to the J3-pin connector on Frontkit Flex.

The QVGA display uses the 8-bit Special optimized Screen Interface (SoSSI) for data and

The QVGA LCD Module operates using V_2.775D and V_EXT_1.85. The V_2.775D is the module's

analog supply voltage sourced by LDO6 of MAKO. The V_EXT_1.85 is the module's IO voltage

sourced by the 1.85V external LDO regulator. An 8-bit parallel bus is used for data and command

communication between OMAP's SoSSI interface and LCD driver IC. The F_DISP_DATA_CMD

signal indicated the type of data being sent to the driver. A '0' corresponds to command data and a

'1' corresponds to display data. Data only travels in one direction, from OMAP to display driver.

Therefore F_DISP_RW line will always be low. Display data is latched on the falling edge of the

F_DISP_RW_EN signal.

The SoSSI interface uses the LCD DMA controller/bus to allow the LCD module to access system

memory. Therefore the transfer of pixel data process will require less CPU processing power. An

initiate DMA transfer command is used and display data is transferred to the LCD module

automatically without intervention thus offloading the processor.

CPLD (INVERT)