Schematic Diagram - Dsp Board (2/4) - Sony STR-DA4300ES Service Manual

Multi channel av receiver
Hide thumbs Also See for STR-DA4300ES:
Table of Contents

Advertisement

6-30. SCHEMATIC DIAGRAM – DSP Board (2/4) –
1
2
3
A
DSP BOARD
(2/4)
B
6
5
85
1
DSP
2
BOARD
3
(1/4)
C
(Page
4
GND
54)
D
50
PWR_EXT
48
PWR_EXT
46
PWR_INT
44
PWR_INT
42
GND
40
GND
38
SO_B
E
36
SO_D
34
DSP_LRCK
32
GND
30
RESERVED
28
GND
SI_B
26
SI_B
SI_D
24
SI_D
LRCK
F
22
LRCK
20
GND
BCK
18
BCK
16
GND
DM_INT
14
DM_INT
12
DIR_RERR
R5096
TX
0
10
TX
DM_BUSY
8
DM_BUSY
MD_DATA
G
6
MD_DATA
MD_INT
4
MD_INT
MODE_MD2
2
MODE(MD2)
(Page
43)
H
I
J
K
L
STR-DA4300ES
• See page 110 for IC Block Diagrams.
4
5
6
7
R5068
1k
97
DSP
GND
BOARD
(Page 57)
(4/4)
3.3V
CN5001
50P
98
49
PWR_EXT
GND
47
DSP
PWR_EXT
3.3V
BOARD
(Page 56)
PWR_INT
45
2.5V
(3/4)
PWR_INT
43
DSP2_LRCK
41
GND
SO2_D
39
GND
SO2_B
91
37
SO2_A
SO_A
35
SO2_C
SO_C
DSP
33
SO2_E
BOARD
SO_E
(3/4)
31
GND
(Page 56)
DSP_BCK
29
DSP2_BCK
GND
27
R5003
SI_A
1k
D5001
SI_A
25
SI_C
1SS355WTE-17
SI_C
23
SI_E
SI_E
21
RDATA0
GND
19
C5100
R5004
MCK1
470p
1M
MCK
17
GND
15
DUCOM_RESET
DUCOM_RESET
13
DIR_NONAU
11
RX
RX
9
MD_BUSY
MD_BUSY
7
93
DM_DATA
DM_DATA
5
DUCOM_CLK
3
BOARD
1
DRST_TRG
DRST_TRG
(4/4)
MODE_MD2
MODE_MD2
(Page 57)
MD_INT
MD_INT
C
MD_DATA
MD_DATA
DM_BUSY
D.AUDIO
DM_BUSY
BOARD
TX
(3/5)
TX
DM_INT
CN2206
DM_INT
90
DSP
BOARD
(1/4)
(Page 54)
8
9
10
11
FB5003
IC5006
C5088
0.1
FLASH MEMORY
IC5006
DSP1_A17
S29AL008D70TFI010-EX4116
DSP1_A16
3.3
3.3
A15
1
48
A16
DSP1_A15
3.3
A14
2
47
BYTE#
DSP1_A14
3.3
3
A13
46
VSS
DSP1_A13
3.3
3.3
A12
4
45
DQ15/A-1
DSP1_A12
3.3
3.3
5
A11
44
DQ7
DSP1_A11
3.3
6
A10
43
DQ14
DSP1_A10
3.3
3.3
7
A9
42
DQ6
DSP1_A9
3.3
8
41
A8
DQ13
DSP1_A20
0
3.3
A19
9
40
DQ5
10
NC
39
DQ12
DSP1_WE
3.3
3.3
11
WE#
38
DQ4
3.3
3.3
C5090
12
RESET#
37
0.1
VCC
NC
13
36
DQ11
3.3
NC
14
35
DQ3
RY/BY#
15
34
DQ10
DSP1_A19
3.3
3.3
A18
16
33
DQ2
DSP1_A18
3.3
A17
17
32
DQ9
DSP1_A8
3.3
3.3
A7
18
31
DQ1
DSP1_A7
3.3
A6
19
30
DQ8
DSP1_A6
3.3
3.3
20
A5
29
DQ0
DSP1_A5
3.3
3.3
21
A4
28
OE#
DSP1_A4
3.3
22
A3
27
VSS
DSP1_A3
3.3
0
23
A2
26
CE#
DSP1_A2
3.3
3.3
24
A1
25
A0
DSP1_A1
DSP1_A0
DSP
DSP1_OE
7
8
9
IC B/D
IC5009
ADDRESS LATCH
IC5009
SN74LVC573APWR
3.3
1
20
OE
VCC
DSP1_D0
3.3
3.3
2
19
D0
O0
DSP1_D1
3.3
3.3
3
18
D1
O1
DSP1_D2
3.3
3.3
4
17
D2
O2
DSP1_D3
3.3
3.3
5
16
D3
O3
DSP1_D4
3.3
3.3
6
15
D4
O4
DSP1_D5
3.3
3.3
7
14
D5
O5
DSP1_D6
3.3
3.3
8
13
D6
O6
DSP1_D7
3.3
3.3
9
12
D7
O7
0
10
11
GND
LE
55
55
12
13
14
FB5004
C5091
10
DSP1_A0
DSP1_A1
DSP1_A2
DSP1_A3
DSP1_A4
DSP1_D4
DSP1_D5
DSP1_D6
R5078
DSP1_D7
0
RB5012
RB5010
33
33
DSP1_D0
DSP1_D1
DSP1_D2
DSP1_D3
DSP1_WE
DSP1_A5
DSP1_A6
DSP1_D0
DSP1_A7
DSP1_D1
DSP1_D2
DSP1_A8
DSP1_D3
DSP1_A9
RB5011
33
R5076
0
DSP1_OE
IC B/D
FB5006
IC5010
ADDRESS LATCH
IC5010
C5053
C5092
C5093
SN74LVC573APWR
10
0.1
0.1
3.3
RB5006
1
OE
VCC
20
47
DSP1_A8
DSP1_A0
3.3
3.3
2
D0
O0
19
DSP1_A9
DSP1_A1
3.3
3.3
DSP1_A10
3
D1
O1
18
DSP1_A11
DSP1_A2
3.3
3.3
4
D2
O2
17
DSP1_A3
3.3
3.3
5
16
RB5007
D3
O3
47
DSP1_A12
DSP1_A4
3.3
3.3
15
6
D4
O4
DSP1_A13
DSP1_A5
3.3
14
DSP1_A14
7
D5
O5
DSP1_A15
DSP1_A6
3.3
3.3
13
8
D6
O6
3.3
12
9
D7
O7
DSP1_ALE
0
10
11
GND
LE
STR-DA4300ES
15
16
17
18
IC5007
S-RAM
C5094
C5095
C5096
C5097
0.1
10
0.1
0.1
IC5007
IS61LV5128AL-10TLI
1
NC
44
NC
2
NC
43
NC
3
A0
42
NC
DSP1_A18
4
A1
41
A18
DSP1_A17
5
A2
40
A17
DSP1_A16
6
A3
39
A16
DSP1_A15
7
38
A4
A15
8
37
CE
OE
9
36
I/O0
I/O7
10
35
I/O1
I/O6
RB5013
11
34
VDD
GND
33
DSP1_D7
12
33
GND
VDD
DSP1_D6
13
I/O2
32
DSP1_D5
I/O5
DSP1_D4
14
I/O3
31
I/O4
DSP1_A14
15
WE
30
A14
DSP1_A13
16
A5
29
A13
DSP1_A12
17
A6
28
A12
DSP1_A11
18
A7
27
A11
DSP1_A10
19
A8
26
A10
20
A9
25
NC
21
NC
24
NC
22
NC
23
R5077
NC
0
RB5008
47
DSP1_A16
DSP1_A17
DSP1_A18
DSP1_A19
IC5012
INVERTER
R5097
22
DSP1_A20
IC5012
TC7SHU04FU(T5RSOJF)
R5098
1
NC
5
VCC
22
2
GND
4
3
DSP1_ALE
C5098
0.1

Advertisement

Table of Contents
loading

Table of Contents