Sony HBD-E570 Service Manual page 86

HBD-E370/E470/E570/E870/T57
QQ
3 7 63 1515 0
Pin No. Pin Name
AW7 AVDD12_SRX2
AW9 AVSS12_ST2
AW11 GPIO5
AW13 DVSS
AW15 A_RDQ1
AW17 DVSS
AW19 A_RDQ12
AW21 DVSS
AW23 A_RODT
AW25 DVSS
AW27 A_RA9
AW29 DVSS
AW31 A_RDQ18
AW33 DVSS
AW35 A_RDQ28
AW37 DVSS
AW39 A_AVDD12_MEMPLL
AW41 B_RDQ4
AW43 B_RDQ1
AY2 NS_TSTN
AY4 SRXP_2
AY6 AVDD12_STX2
AY8 AVSS33_XTAL25M
AY10 GPIO4
AY12 TRST
AY14 VCC2IO
AY16 A_RDQS0
TE
L 13942296513
AY18 VCC2IO
AY20 A_RDQ8
AY22 VCC2IO
AY24 A_RA4
AY26 VCC2IO
AY28 A_RA10
AY30 VCC2IO
AY32 A_RDQ22
AY34 VCC2IO
AY36 A_RDQ24
AY38 VCC2IO
AY40 A_AVSS12_MEMPLL
AY42 DVSS
BA1 NS_TSTP
BA3 STXN_1
BA5 STXN_2
BA7 RREF
BA9 XTAL25MO
BA11 TCK
BA13 A_RDQ4
BA15 A_RDQ6
BA17 A_RDQS1B
BA19 A_RDQ15
BA21 A_RCLK0B
BA23 A_RA8
BA25 A_RA12
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BA27 A_RA7
BA29 A_RCKE
BA31 A_RDQ20
.
BA33 A_RDQS2
BA35 A_RDQS3B
BA37 A_RDQ26
BA39 A_RCLK1
86
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I/O
- Power supply terminal (+1.2V)
- Ground terminal
- Not used
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
O On die termination enable signal output to the SD-RAM
- Ground terminal
O Address signal output to the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
I/O Two-way data bus with the SD-RAM
- Ground terminal
- Power supply terminal (+1.2V)
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
- Not used
I SATA channel 2 RX differential pair signal (positive) input terminal
- Power supply terminal (+1.2V)
- Ground terminal
- Not used
- Not used
- Power supply terminal (+1.8V)
O Data strobe signal (positive) output to the SD-RAM
- Power supply terminal (+1.8V)
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+1.8V)
O Address signal output to the SD-RAM
- Power supply terminal (+1.8V)
O Address signal output to the SD-RAM
- Power supply terminal (+1.8V)
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+1.8V)
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+1.8V)
- Ground terminal
- Ground terminal
- Not used
O SATA channel 1 TX differential pair signal (negative) output terminal
O SATA channel 2 TX differential pair signal (negative) output terminal
- Not used
O System clock signal output terminal (25 MHz)
- Not used
I/O Two-way data bus with the SD-RAM
I/O Two-way data bus with the SD-RAM
O Data strobe signal (negative) output to the SD-RAM
I/O Two-way data bus with the SD-RAM
O Clock signal (negative) output to the SD-RAM
O Address signal output to the SD-RAM
O Address signal output to the SD-RAM
O Address signal output to the SD-RAM
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O Clock enable signal output to the SD-RAM
y
I/O Two-way data bus with the SD-RAM
i
O Data strobe signal (positive) output to the SD-RAM
O Data strobe signal (negative) output to the SD-RAM
I/O Two-way data bus with the SD-RAM
O Clock signal (positive) output to the SD-RAM
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2 9
8
Description
Q Q
3 6 7 1 3 1 5
co
.
9 4 2 8
Not used
0 5 8 2 9 9 4 2 8
Not used
m
9 9
9 9