Table of Contents
Advertisement
64LHP5000
PROJECTOR UNIT
Pin No.
Pin Name
80
DGND
81
AVDD
82
CBPC
83
ACO
84
AYO
85
CBPY
86
AGND
87
AGND
88
AYI
89
VCLY
90
VRBY
91
VRTY
92
AVDD
93
AVDD
94
VRTC
95
VRBC
96
ACI
97
AGND
98
MRAS
99
MA8
100
DVDD
Ë TA1270AF (SIGNAL ASSY: IC7100, IC7300)
COLOR DEMODULATION SYNC SEPARATION IC
» Block Diagram
38
37
LEVEL
DAC2
SHIFT SW
DAC1
39
DAC1
CONTRAST
Y Input
40
PEDESTAL
CLAMP
DAC Vcc
41
(5V)
Y DL
C Vcc
42
(5V)
43
UV/IQ SW
44
fsc
fsc Output
1H DL
1HDL CONT
45
CONTROL
SECAM
46
SECAM CONT
CONTROL
B-Y/Q Output
47
IQ/UV
SW
R-Y/I Output
48
VCXO
1
2
I/O
Digital block ground
–
Y-DAC, C-DAC power supply
–
C-DAC phase compensation output
O
C-DAC analog C signal output
O
Y-DAC analog Y signal output
O
Y-DAC phase compensation output
O
Y-ADC, C-DAC ground
–
Y-DAC ground
–
Y-ADC analog composite signal/Y signal input
I
Y-ADC clamp potential output
O
Y-ADC bottom reference voltage output
O
Y-ADC top reference voltage output
O
Y-ADC, C-ADC power supply
–
Y-ADC, C-ADC power supply
–
C-ADC top reference voltage output
O
C-ADC bottom reference voltage output
O
C-ADC analog C signal input
I
C-ADC ground
–
RAS output for external EDO memory (Active low)
O
Address output for external EDO memory
O
Digital block power supply
–
36
35
34
33
32
31
2
DAC
I
C BUS
PEDESTAL
Ys
TEST
CONTROL
CLAMP
SUB-
Y DL
OFFSET
SW
SW
fsc
TRAP
SYSTEM
CW
TINT
MATRIX
DEMO
P/N ID
LPF/fsc
CHROMA
TRAP
BLK
SW
V
BPF
SEP
TOF
APC
SYNC
SEP
ACC
3
4
5
6
7
8
Function
30
29
28
27
26
25
PEDESTAL
CLAMP
HI ; 2ch / LOW ; 24h
SW
RGB
SW
MATRIX
NOSE
CP/HP
DET
IN
H. AFC
H C/D
V C/D
SCP
32fH
VCO
9
10
11
12
13
14
84
24
SW GND
23
ADRS SW
22
R-Y/R Output
21
B-Y/B Output
20
Y/G Output
SW Vcc
19
(9V)
SYNC Vcc
18
(9V)
17
CP/HP Input
16
Dig GND
15
SCP Output
Advertisement
Table of Contents
