Seagate Medalist ST3636A Product Manual

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Summary of Contents for Seagate Medalist ST3636A

  • Page 1 ........ST3636A ........
  • Page 3 ST3636A/ST31082A/ST31276A Intelligent Disk Drive Product Manual P/N 20401028-001 Revision C September 1996 920 Disc Drive Scotts Valley, California 95066...
  • Page 5: Fcc Notice

    Printing Office, Washington, DC 20402. Warning: Changes or modifications made to this equipment which have not been expressly approved by Seagate Technology, Inc. may cause radio and television interference problems that could void the user's authority to operate the equipment.
  • Page 6 Seagate Technology, Inc. Seagate Technology, Inc. provides this manual "as is," without warranty of any kind, either expressed or implied, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. Seagate Technology, Inc.
  • Page 9: Table Of Contents

    Table of Contents 1. Overview of the Drive What is the Drive? Features of the Drive What the Drive is Composed Of Mechanical Design Features Drive Assembly Housing Head Positioning Mechanism Read/Write Heads and Disks Data and Power Connections Electrical Design Features Pre-amplifier Circuit Board Firmware...
  • Page 10 Table of Contents ST3636A/ST1082A/ST31276A 5. Host Interface About the Host Interface Signal Conventions Signal Levels Signal Descriptions ATA/CAM Master/Slave Reset Timing Host PI0 16-Bit Timing Values Host Demand Mode DMA 16-bit Interface Timing Values 6. Register Addresses and Functions Host Address Decoding...
  • Page 11 ST3636A/ST1082A/ST31276A Table of Contents Write DMA Write Caching Write Multiple Write Caching Write Sector(s) Write Caching Write Sector Buffer 8. Error Reporting Error and Status Detection Error and Status Messages Glossary Technical Reference Manual Page iii...
  • Page 12 Table of Contents ST3636A/ST1082A/ST31276A Page iv ST3636A/ST31082A/ST31276A...
  • Page 13: Overview Of The Drive

    Throughout this document, the Medalist 1276 is referred to as the ST31276A, The Medalist 1082 is referred to as the ST31082A and the Medalist 636 is referred to as the ST3636A. For simplicity, we often refer to these drives collectively in this manual as “the drive”.
  • Page 14: What The Drive Is Composed Of

    Head Positioning Mechanism The read/write heads are supported by a mechanism coupled to a rotary voice coil actuator. Page 2 ST3636A/ST31082A/ST31276A...
  • Page 15: Read/Write Heads And Disks

    Cover Power Connector Read/Write Heads and Disks Data is recorded on a 95mm diameter disk using thin film tri-pad or close proximity head. The ST3636A contains: • one disk with two data surfaces • two read/write heads The ST31082A and ST31276A contain: •...
  • Page 16: Data And Power Connections

    The command set allows the host to request the following types of actions: • report drive status • seek a specific point on the disk • read and write data For more information on the drive’s command set, refer to chapters 6 and 7. Page 4 ST3636A/ST31082A/ST31276A...
  • Page 17: Specifications

    Specifications Specifications In This Chapter This chapter defines the following specifications for the drive: • drive capacity • physical configuration • performance characteristics • read/write characteristics • reliability • power requirements • environmental tolerances • safety standards • physical characteristics Technical Reference Manual Page 5...
  • Page 18: Drive Capacity

    Formatted Capacity: • A: 635MB ST3636 • ST31082A: 1082MB • ST31276A: 1275MB * 1MB = 1 x 10 bytes Physical Configuration Specification ST3636A: ST31082A: ST31276A: Disk Type Sputtered Sputtered Sputtered Thin Film Thin Film Thin Film Head Type Thin Film...
  • Page 19: Performance Characteristics

    Specifications Chapter 2 Performance Characteristics Seek Times (typical)* : • Track to track: 3.0 ms • Average: 12.5 ms • Maximum: 24 ms The timing is measured through the interface with the drive operating at nominal DC input voltage and nominal operating temperature. The timing also assumes that: BIOS and PC system hardware dependency have been subtracted from timing measurements the drive is operated using its native drive parameters the controller overhead is the time it takes to assert +HOST IRQ after the host writes the...
  • Page 20: Read/Write Characteristics

    < 1 non-recoverable error in 10 bits read Component Design Life: • 5 years Start/Stop Cycles: • 40,000 minimum Mean Time Between Failures: • 300,000 power-on hours Mean Time to Repair: • 10 minutes typical Preventive Maintenance: • none Page 8 ST3636A/ST31082A/ST31276A...
  • Page 21: Power Requirements

    Specifications Chapter 2 Power Requirements +5 Volts +12 Volts Watts (typical): (typical): (typical): Mode: * (maximum): Read/Write 450 mA 160 mA 4.2 W 4.6 W Seek/Rd/Wr 430 mA 200 mA 4.6 W 4.9 W Idle 270 mA 180 mA 3.5 W 4.0 W Standby 200 mA...
  • Page 22: Product Test Standards

    • VDE 0805, VDE 0805 TIEL 100, and VDE 0806 The drive has been tested for compliance with FCC Class B, Part 15, Subpart J The drive has been tested to be compatible with EMC directive 89/336/EEC. Page 10 ST3636A/ST31082A/ST31276A...
  • Page 23: Physical Characteristics

    Physical Characteristics Height: Depth: 1.0 inch + .030 5.75 inches + .030 Width: Weight: 4.0 inches + .030 ST3636A :1.1 lbs ST31082A and ST31276A:1.2 lbs Figure 2-1 The Drive’s Physical Dimensions 0.23 +.015 [5.842 +.381] Note: [mm] .xx + .01 .xxx + .005...
  • Page 24 Chapter 2 Specifications Page 12 ST3636A/ST31082A/ST31276A...
  • Page 25: How The Drive Operates

    How the Drive Operates Functions of the Drive This chapter describes certain operational aspects of the drive, including discussions of: drive operational modes error correction Universal Translate Mode master/slave configurations Drive Operational Modes The drive operates in the following modes: Read/Write Mode occurs when data is read from or written to the disk.
  • Page 26: Universal Translate Mode

    How the Drive Operates Universal Translate Mode Seagate has established a Universal Translate Mode which enables you to configure the drive in an AT environment to any cylinder, head, and sector configuration desired. The translate configuration is limited by the maximum capacity of the drive and host system parameters.
  • Page 27: Cable Select

    How the Drive Operates Chapter 3 Cable Select This optional method of drive Master/Slave designation can be enabled by D1 jumper selection as described in Chapter 4. If used, special cabling can be used to selectively ground CSEL of the drive intended to be drive C (0). This drive will then function as the Master.
  • Page 28 Chapter 3 How the Drive Operates Page 16 ST3636A/ST31082A/ST31276A...
  • Page 29: Installing The Drive

    Installing the Drive Take These Precautions To protect your equipment from electrostatic damage, perform the installation at a static-safe workstation. If one is not available, follow these guidelines: 1. Work in an uncarpeted area. 2. Before removing the equipment from its anti-static bag, discharge static electricity by touching your computer's metal chassis (or any other grounded object) while touching the anti-static bag.
  • Page 30: Setting The Drive's Jumpers

    Here is how you can set these jumpers. Pins described as “reserved” should not be used. D1 (Pins 3&4) D0 (Pins 5&6) Description Slave Open Open Open Closed Master Closed Open Cable Select enabled Closed Closed Master W/forced Slave present Page 18 ST3636A/ST31082A/ST31276A...
  • Page 31: Attaching A Data Cable To The Drive

    Installing the Drive Chapter 4 Attaching a Data Cable to the Drive Attach the data cable from the host to the Task File Interface connector, as shown in figure 4-2. Refer to the table on the following page for pin out information.
  • Page 32 - HOST CS0 - HOST CS1 - DASP The recommended mating connector for the Task File Interface is Molex P/N 15-47-5401 or equivalent. You may daisy-chain two drives on this connector. The maximum cable length is 18 inches. Page 20 ST3636A/ST31082A/ST31276A...
  • Page 33: Attaching Power To The Drive

    Installing the Drive Chapter 4 Attaching Power to the Drive The drive has an industry standard 4-pin DC power connector. Figure 4-3 Attaching a Power Cable Pin 1 Standard 4-Pin Power Connector Caution: Do not route the power cable next to the drive PCB or any other high frequency or large current switching signals.
  • Page 34: Mounting The Drive

    Caution: When using the side mounting holes, verify the screw length to ensure clearance from the drive's printed circuit board before tightening the screw. Refer to figure 2-1 in chapter 2 for dimensions and the location of mounting screw holes. Page 22 ST3636A/ST31082A/ST31276A...
  • Page 35: Host Interface

    Host Interface About the Host Interface The interface between the drive adapter and the drive is called the host interface. The set of registers in the I/O space of the host that are controlled through the host interface is known as the task file. The physical interface from the drive to the host is called the task file interface and is implemented using a 40-pin connector.
  • Page 36: Signal Descriptions

    IRQ is reset to zero by a host read of the Status register after completion of a data transfer phase or a write to the Command register. This signal is a tri-state line with 8 mA drive capacity. Page 24 ST3636A/ST31082A/ST31276A...
  • Page 37 Host Interface Chapter 5 Signal Name: Dir: Pin: Description: -HOST IO16 Indication to the host system that the 16-bit data register has been addressed and that the drive is prepared to send or receive a 16-bit data word. This line is tri-state line with 24 mA drive capacity.
  • Page 38: Ata/Cam Master/Slave Reset Timing

    Any time after negation of DASP-, either drive may assert DASP- to indicate that a drive is active. ATA/CAM Master/Slave Reset Timing Figure 5-1 illustrates the ATA/CAM Master/Slave reset sequence. Figure 5-1 ATA/CAM Reset Sequence -Reset -DASP -PDIAG BSY bit in Status Register Page 26 ST3636A/ST31082A/ST31276A...
  • Page 39 Host Interface Chapter 5 Description Label POR Value Soft Reset Value -Reset width (min) 25µs -DASP asserted (max) -DASP after Reset (max) 450ms Slave DIAG complete (max) Drive BSY (max) -DASP after -PDIAG (min) >0 BSY status after Reset 400ns 400ns (max) -PDIAG after Reset (max)
  • Page 40: Host Pi0 16-Bit Timing Values

    * Under conditions equivalent to a 330 ohm pullup and a 56pf load. Cable type and length may affect the values measured at the drive or host interface. Figure 5-3 Interface PIO Timing Diagram A[0:2] -HCS0/-HCS1 -IOCS16 -IOR/-IOW HDB[0:15] (read) HDB[0:15] (write) -IOCHRDY -IOR or -IOW CYCLE TIME S541_5_3 -IOR/-IOW Page 28 ST3636A/ST31082A/ST31276A...
  • Page 41: Host Demand Mode Dma 16-Bit Interface Timing Values

    Host Interface Chapter 5 Host Demand Mode DMA 16-bit Interface Timing Values The values* in the table below refer to the timing diagram in figure 5-4. Parameter: Min: Max: Units: Symbol +DMARQ low from -IOR/-IOW low -DACK hold from -IOR/-IOW high -DACK low to -IOR/-IOW low -IOR/-IOW pulse width --IOR/-IOW cycle time...
  • Page 42 Chapter 5 Host Interface Page 30 ST3636A/ST31082A/ST31276A...
  • Page 43: Register Addresses And Functions

    Register Addresses and Functions Host Address Decoding The host computer addresses the drive using programmed I/O. This method requires that: • a proper chip select be asserted • the desired register address be placed on the three host address lines (HA2 - HA0) •...
  • Page 44 Not Used x = don't care * These I/O port addresses are listed for programmer reference. They are a function of I/O decoding in the Host Adapter. These addresses are required for compatibility with most AT BIOS. Page 32 ST3636A/ST31082A/ST31276A...
  • Page 45: Addressing The Data

    Register Addresses and Functions Chapter 6 Addressing the Data There are two methods of addressing the sectors on the disk drive. Cylinder-head-sector (CHS) mode The first method, which is the traditional approach, uses Cylinder-Head-Sector (CHS) addressing. Most disk drives today exceed the number of cylinders limit of DOS or use zone recording (different number of sectors per track in each zone) so the parameters reported by the drive in the Identify Device command are logical translations done by the drive.
  • Page 46: Descriptions Of The Registers

    Data is stored on the disk with the Least Significant Byte (LSB) first, then the Most Significant Byte (MSB) for each word. This is important to remember when testing the ECC circuitry. Page 34 ST3636A/ST31082A/ST31276A...
  • Page 47: Error Register

    Register Addresses and Functions Chapter 6 Error Register Port Address: -HOST CS0 Chip Select: Register Address: Function: Read only Description: This register contains status from the last command executed by the drive. The contents of this register are only valid when the error bit (ERR) is set in the Status Register, unless the drive has just powered up or completed execution of its internal diagnostic, in which case the register contains a status code.
  • Page 48: Features Register (Formerly Write Precomp Register)

    During multiple sector transfers, this register is updated to point at the next sector to be read/written if the previous sector’s operation was successful. Page 36 ST3636A/ST31082A/ST31276A...
  • Page 49: Cylinder Low

    Register Addresses and Functions Chapter 6 Cylinder Low Port Address: Chip Select: -HOST CS0 Register Address: Function: Read/Write CHS Description: This register contains the low-order 8 bits of the starting cylinder number for any disk access. LBA Description: This register contains bits 8-15 of the logical block address. At the completion of each sector and at the end of the command, this register is updated to reflect the current cylinder number.
  • Page 50: Device/Head Register

    CHS Description: This is the four-bit binary encoded head select number. LBA Description: This register contains bits 24-27 of the logical block address. At the completion of each sector and at the end of the command, this register is updated to reflect the currently selected head. Page 38 ST3636A/ST31082A/ST31276A...
  • Page 51: Status Register

    Register Addresses and Functions Chapter 6 Status Register Port Address: Chip Select: -HOST CS0 Register Address: Function: Read only Description: This register contains the drive/controller status. The contents of this register are updated at the completion of each command. If the Busy bit is active, no other bits are valid. The host reading this register when an interrupt is pending is considered to be the interrupt acknowledge, and any pending interrupt is therefore cleared whenever this register is read.
  • Page 52: Alternate Status Register

    The bits in this register are defined below: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DRDY CORR See the description of the Status register for definitions of the bits in this register. Page 40 ST3636A/ST31082A/ST31276A...
  • Page 53: Device Control Register

    Register Addresses and Functions Chapter 6 Device Control Register Port Address: Chip Select: -HOST CS1 Register Address: Function: Write only Description: This register contains two control bits as follows: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SRST...
  • Page 54: Drive Address Register

    Description: The eight-bit code written to this register passes the command from the host to the drive. Command execution begins immediately after this register is written. Refer to chapter 7 for a list of executable commands with the command codes and necessary parameters for each command. Page 42 ST3636A/ST31082A/ST31276A...
  • Page 55 This I/O map defines the register addresses and functions for these I/O locations. For ease of reference, the commands are listed in alphabetical order. Command Code Parameters: Command: Seagate Specific Execute Drive Diagnostic Identify Device Init. Device Parameters Power Commands...
  • Page 56 • p is a valid bit for power commands E0 - E3 and E5 - E6. • e means the registers contain valid parameters when performing extended commands. • x = don’t care. Page 44 ST3636A/ST31082A/ST31276A...
  • Page 57: Command Set

    Command Set Command Register All commands are decoded from the Command Register. The drive’s host interface shall be programmed by the host computer to perform commands and will return status to the host at command completion. To issue a command, the host must: load the pertinent registers in the Task File activate the interrupt enable bit, -IEN, in the register...
  • Page 58: Seagate Specific

    Seagate Specific Command Number: 9A hex Description: The Seagate drive provides vendor-unique commands to allow for certain operations not provided by the standard command set. The Sector Number register must be set to 9A hex and the specific command in the Sector Count register.
  • Page 59: Get Drive Feature Word (00)

    Command Set Chapter 7 Get Drive Feature word (00) This command fetches the drive feature word and returns it in the Cylinder High and Cylinder Low registers. The bit meaning is as follows: Bit: Description: Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved...
  • Page 60: Execute Drive Diagnostic

    Format Track Command Number: 50 hex This command is not supported on the drive. The implementation of this command has become vendor specific due to the complexities of address translation and is not required for ATA compliance. Page 48 ST3636A/ST31082A/ST31276A...
  • Page 61: Identify Device

    Command Set Chapter 7 Identify Device Command Number: EC hex Description: This command allows the host to receive parameter information from the drive. When the command is issued, the drive sets BSY, stores the required parameter information in the sector buffer, sets the DRQ bit, and generates an interrupt. The host may then read the information out of the sector buffer.
  • Page 62 = current setting for number of sectors per transfer on R/W Multiple commands LSW Total number of user addressable sectors (LBA mode only) MSW Total number of user addressable sectors (LBA mode only) bits 15-8 Vendor specific (Obsolete) bits Vendor specific (Obsolete) Page 50 ST3636A/ST31082A/ST31276A...
  • Page 63 Command Set Chapter 7 Word Description: (hex) bits 15-8 01 hex = Multiword DMA transfer mode active bits 7-3 reserved for future Multiword DMA transfer modes** 1 = Multiword DMA transfer Mode 2 supported 0 = Multiword DMA transfer Mode 2 NOT supported 1 = Multiword DMA transfer Mode 1 supported 0 = Multiword DMA transfer Mode 1 NOT supported 1 = Multiword DMA transfer Mode 0 supported...
  • Page 64 (nsec) (nsec) Cycle Time Mode 0 Mode 1 Mode 2 (nsec) (nsec) (nsec) Multiword DMA Timing Cycle Time >= 150 >= 120 Mode 3 Mode 4 Advanced PIO Timing (nsec) (nsec) Cycle Time >= 180 >= 120 Page 52 ST3636A/ST31082A/ST31276A...
  • Page 65: Initialize Device Parameters

    Upon receipt of the command, the drive sets BSY, saves the parameters, resets BSY, and generates an interrupt. Seagate has established a Universal Translate Mode which enables you to configure the drive in an AT environment to any cylinder, head, and sector configuration desired (refer to chapter 3).
  • Page 66: Power Commands

    Command Number: Ex hex Description: The Power commands are supported on some Seagate drives, including the ST3636A, ST31082A and ST31276A. If a Power command is issued to a drive that does not support the Power commands, an Abort status will be returned to the host in the Error register.
  • Page 67: Read Dma

    Command Set Chapter 7 All of the Power commands except command E6 will execute immediately and return the ending interrupt after the spin up/down sequence is initiated. Please note that if the drive is already spinning (Idle Mode) and a spin-up command is issued from the host, the spin-up sequence is not initiated.
  • Page 68: Read Multiple

    All other errors will cause the command to stop after transfer of the block which contained the error. Interrupts are generated when DRQ is set at the beginning of each block or partial block. Page 56 ST3636A/ST31082A/ST31276A...
  • Page 69: Read Sector(S)

    Command Set Chapter 7 Read Sector(s) Command Number: 2x hex Description: This command will read from 1 to 256 sectors as specified in the Task File (a sector count of 0 is a request for 256 sectors), beginning at the specified sector.
  • Page 70: Read Sector Buffer

    Read Verify with retries 41 hex Read Verify without retries The drive remains Busy until all data is verified. If Look Ahead Read is active, the Verify command will also work the same as when a Read is performed. Page 58 ST3636A/ST31082A/ST31276A...
  • Page 71: Recalibrate

    Command Set Chapter 7 Recalibrate Command Number: 10 hex Description: This command will move the read/write heads from anywhere on the disk to cylinder 0. Upon receipt of the command, the drive sets BSY, resets DSC, and executes a Seek to cylinder zero. The drive then waits for the Seek to complete before updating status, resetting BSY, setting DSC, and generating an interrupt.
  • Page 72: Set Features (Set Look Ahead Read)

    Enable Mode 4 PIO with IOCHRDY enabled 20 hex Enable Multiword DMA Mode 0 21 hex Enable Multiword DMA Mode 1 22 hex Enable Multiword DMA Mode 2 One transfer mode subcommand may be issued for each SET FEATURES Command. Page 60 ST3636A/ST31082A/ST31276A...
  • Page 73: Set Multiple Mode

    Command Set Chapter 7 Set Multiple Mode Command Number: C6 hex Description: This command enables the controller to perform Read Multiple and Write Multiple operations and establishes the block count for these commands. Prior to command issuance, the Sector Count register should be loaded with the number of sectors per block.
  • Page 74: S.m.a.r.t

    BSY, reads the Attribute Thresholds from non-volatile memory, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Threshold information from the drive via the Data register. Page 62 ST3636A/ST31082A/ST31276A...
  • Page 75 Command Set Chapter 7 Code (hex) Subcommand Enable/Disable Attribute Autosave enables and disables the Attribute AutoSave feature of the device. This feature is automatically enabled when S.M.A.R.T. is enabled. Enable/Disable Attribute Autosave may be set to automatically save its updated Attribute Values to non-volatile memory periodically ;...
  • Page 76 If the device does detect a Threshold Exceeded Condition, the device loads F4 into the Cylinder Low register, 2C in the Cylinder High register, clears BSY, and activates +IRQ. DB - DF Reserved E0 - EF Vendor Specific Page 64 ST3636A/ST31082A/ST31276A...
  • Page 77: Device Attributes Data Structure

    Data Structure Checksum Rd only Total Bytes Data Structure Revision Number The Data Structure Revision Number identifies which version of this data structure is implemented by the drive. The ST3636A, ST31082A and ST31276A support S.M.A.R.T. revision 5.0. Technical Reference Manual Page 65...
  • Page 78 Attribute ID Number indicates an active attribute. Valid values for this byte are from 01 hex through FF hex. Attibute ID Description Firm error rate Spin up time Spin up count Retired sectors Seek error rate Spin retries Drive power cycle count Page 66 ST3636A/ST31082A/ST31276A...
  • Page 79 Command Set Chapter 7 Status Flags The following describes the definitions for the Status Flags: value Description Pre-Failure/Advisory Bit when = 0 means an Attribute Value less 0001 than or equal to its corresponding Attribute Threshold is indicating an advisory condition where the usage or age of the drive has exceeded its intended design life period.
  • Page 80: Device Attribute Thresholds Data Structure

    Rd/Wrt Reserved (00 Rd only Vendor Specific Rd only Data Structure Checksum Rd only Total Bytes Data Structure Revision Number This value will be the same as the value used in the Device Attributes Values Data Structure. Page 68 ST3636A/ST31082A/ST31276A...
  • Page 81 Command Set Chapter 7 Individual Threshold Data Structure The following defines the twelve bytes that make up the information for each Threshold entry in the Device Attribute Thresholds Data Structure. Attribute entries in the Individual Threshold Data Structure must be in the same order and correspond to the entries in the Individual Attribute Data Structure.
  • Page 82: Error Reporting

    Revision Number in the drive's Attribute Thresholds data structure. A mismatch has occurred between the entries in the drive's Attribute Values data structure and Attribute Thresholds data structure. The drive has detected a checksum error in its Attribute Threshold data structure. Page 70 ST3636A/ST31082A/ST31276A...
  • Page 83: Write Dma

    Command Set Chapter 7 Write DMA Command Number: Cx hex Description: This command allows the drive to perform write operations using multiword DMA transfers. These are two versions of this command, as shown below: Command Number: Command Name CA hex DMA Write with retries CB hex DMA Write without retries...
  • Page 84: Write Multiple

    If the next command is a cached write that is not logically sequential, the drive will wait for the previous write to finish before taking the data from the new write. Read commands work similarly; the previous write is allowed to finish before the read operation starts. Page 72 ST3636A/ST31082A/ST31276A...
  • Page 85 Command Set Chapter 7 In addition to caching, dynamic sparing of bad sectors has been implemented for cached write commands. This ensures that cached data that has already been reported as written successfully gets written, even if an error should occur.
  • Page 86: Write Sector(S)

    If an error occurs during a multiple sector write, it will terminate at the sector where the error occurs. The Task File indicates the location of the sector where the error occurred. The host may then read the Task File to determine what error has occurred, and on which sector. Page 74 ST3636A/ST31082A/ST31276A...
  • Page 87: Write Caching

    Command Set Chapter 7 A Write Long may be executed by setting the long bit in the command code. The Write Long command writes the data and the ECC bytes directly from the sector buffer; the drive will not generate the ECC bytes itself for the Write Long command.
  • Page 88 Chapter 7 Command Set Page 76 ST3636A/ST31082A/ST31276A...
  • Page 89: Error Reporting

    Error Reporting Error and Status Detection In general, status and errors are detected in the following fashion by the drive microprocessor. At the start of the execution of the command, the command register is checked for conditions that would lead to an aborted command. If an error is found, an error message is returned in the error register.
  • Page 90 DRDY, DWF, DSC, ERR BBK, IDNF, ABRT Write Sector(s) DRDY, DWF, DSC, ERR BBK, IDNF, ABRT Write Long DRDY, DWF, DSC, ERR BBK, IDNF, ABRT Verify Sectors DRDY, DWF, DSC, CORR, BBK, UNC, IDNF, ABRT Invalid Command ABRT Code Page 78 ST3636A/ST31082A/ST31276A...
  • Page 91: Glossary

    Glossary Actuator - An electro-mechanical apparatus which is used to move one or more read/write heads attached to a common boom. ATA (AT Attachment) - ATA defines the physical, electrical, transport, and command protocols for the internal attachment of block storage devices to hosts. ATA-1 device - A device which complies with X3.221-1994, the AT Attachment Interface for Disk Drives.
  • Page 92 These bits, bytes, fields and code values are not described in the ATA standard, and may vary among vendors. This term is also applied to levels of functionality whose definition is left to the vendor. Page 80 ST3636A/ST31082A/ST31276A...

This manual is also suitable for:

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