Index - Omron CJ2 CPU UNIT User Manual

Cj2 cpu unit hardware
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Items
Auxiliary Area
Temporary Area
Timer Area
Counter Area
DM Area
EM Area
Banks for
Using EM
which bits
Area force-
can be
setting/reset-
force-
ting
*7
set/reset
Using auto-
matic
address allo-
cation speci-
fications
Index Registers
Cyclic Task Flag Area
Memory Card
Operating Modes
Execution Mode
Programming Languages
Function
Maximum number of defini-
Blocks
tions
Maximum number of
instances
FB Program Area
*4 A960 to A1471 and A10000 to A11535 cannot be accessed by CPU Bus Units, Special I/O Units, PTs, and Support Soft-
ware that do not specifically support the CJ2 CPU Units.
*5 Bits in the EM Area can be addressed either by bit or by word. These bits cannot be addressed by CPU Bus Units, Spe-
cial I/O Units, PTs, and Support Software that do not specifically support the CJ2 CPU Units.
*6 EM banks D to 18 cannot be accessed by CPU Bus Units, Special I/O Units, PTs, and Support Software that do not spe-
cifically support the CJ2 CPU Units.
*7 With CJ2H CPU Units with unit version 1.2 or later, force-setting/resetting bits in the EM Area is possible either for banks
that have been specified for automatic address allocation or for banks specified for the EM Area force-set/reset function.
With CJ2M CPU Units, force-setting/resetting bits in the EM Area is possible only for banks specified for the EM Area
force-set/reset function.
CJ2 CPU Unit Hardware User's Manual
CJ2H-
CPU64
CPU65
CPU66
(-EIP)
(-EIP)
(-EIP)
Read-only: 31,744 bits (1,984 words)
• 7,168 bits (448 words): Words A0 to A447
• 24,576 bits (1,536 words): Words A10000 to A11535
Read/write: 16,384 bits (1,024 words) in words A448 to A1471
16 bits: TR0 to TR15
4,096 timer numbers (T0000 to T4095 (separate from counters))
4,096 counter numbers (C0000 to C4095 (separate from timers))
*5
32k words
• DM Area words for Special I/O Units: D20000 to D29599 (100 words × 96 Units)
• DM Area words for CPU Bus Units: D30000 to D31599 (100 words × 16 Units)
32k words/bank × 25 banks max.: E00_00000 to
*5, *6
E18_32767 max.
32K
32K
32K
32K
words ×
words ×
words ×
words ×
4 banks
4 banks
10 banks
15 banks
Banks 0
Banks 0
Banks 0
Banks 0
to 3 hex
to 3 hex
to 9 hex
to E hex
Bank 3
Bank 3
Banks 6
Banks 7
hex
hex
to 9 hex
to E hex
IR0 to IR15
These are special registers for storing PLC memory addresses for indirect addressing. (Index Registers can be set
so that they are unique in each task or so that they are shared by all tasks.)
128 flags
128 MB, 256 MB, or 512 MB
PROGRAM Mode: Programs are not executed. Preparations can be executed prior to program execution in this
mode.
MONITOR Mode:
Programs are executed, and some operations, such as online editing, and changes to present
values in I/O memory, are enabled in this mode.
RUN Mode:
Programs are executed. This is the normal operating mode.
Normal Mode
Ladder Logic (LD)
Sequential Function Charts (SFC)
Structured Text (ST)
Instruction Lists (IL)
2,048
2,048
---
CPU67
CPU68
CPU
(-EIP)
(-EIP)
11/31
12/32
*4
*4
32k words/bank × 4 banks max.: E00_00000 to
E3_32767 max.
32K words × 1 bank
32K
words ×
25 banks
Banks 0
Bank 0 hex
to 18 hex
Banks 11
---
to 18 hex
256
256
20K steps
1 Overview
CJ2M-
CPU
CPU
CPU
CPU
13/33
14/34
15/35
*5
32K words × 4
banks
Banks 0 to 3 hex
2,048
2,048
1-15
1

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