Xilinx System Generator V2.1 Reference Manual page 80

Xilinx System Generator v2.1 Reference Guide
Block Parameters Dialog Box
The block parameters dialog box can be invoked by double-clicking the icon in your
Simulink model.
Figure 3-53: FIR block parameters dialog box
Parameters specific to the block are:
80
Coefficients: vector of filter coefficients; note that these can be evaluated from
a MATLAB workspace variable and may in turn be computed by MATLAB. You
can also refer to examples in the System Generator Tutorial.
Coefficient Structure: Xilinx Smart-IP core preferred implementation
depends on the structure of the sequence of filter taps. You can choose one of
these: inferred from coefficients, none, symmetric, negative symmetric, half band,
and interpolate fir.
Number of bits per coefficient: Xilinx fixed point parameter.
Binary point for coefficients: Xilinx fixed point parameter.
Coefficient arithmetic type: Xilinx fixed point parameter.
Number of Channels: One to eight, inclusive. For multi-channel filters,
polyphase behavior is not supported, i.e. the filter must be single rate. The core,
which processes the channels serially, will be overclocked by the System
Generator by a factor equaling the number of channels so as to provide the
necessary throughput. To reduce control logic overhead, the block requires that
the valid bits match on all inputs.
Xilinx Development System