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Siemens SPC3 Hardware Description

Siemens SPC3 Hardware Description

Profibus controller
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SIMATIC NET
SPC3 Siemens PROFIBUS Controller
Hardware Description
Date 2003/04/09

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  • Page 1 SIMATIC NET SPC3 Siemens PROFIBUS Controller Hardware Description Date 2003/04/09...
  • Page 3 SIM ATIC - NET SPC3 Hardw are Description (Siem ens P R OFIBU S Controller according to IEC 61158) Version: 1.3 Date: 2003/04...
  • Page 4 We gratefully accept suggestions for improvement Copyright Copyright © Siemens AG 2003. All Rights Reserved. Unless permission has been expressly granted, passing on this document or copying it, or using and sharing its content are not allowed. Offenders will be held liable.
  • Page 5 12/23/99 V 1.2 09/25/02 V 1.3 2003/04 SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 Changes Chapter 8.2 Current consumption without bus accesses Chapter 10.1 Contact persons Included the specification of the different manufacturers in Chap. 8.1, 8.3, 8.5 and 10.3 Order numbers chap 10.1 contact persons...

  • Page 6: Table Of Contents

    General Description 7.1.2 Bus Interface Unit (BIU) 7.1.3 Switching Diagram Principles 7.1.4 Application with the 80 C 32 7.1.5 Application with th 80 C 165 Page 4 2003/04 SPC3 V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...
  • Page 7 11.2.2 EXT_DIAG 11.2.3 EXT_DIAG_OVERFLOW 11.3 Diagnostics Processing from the System View APPENDIX B: USEFUL INFORMATION 12.1 Data format in the Siemens PLC SIMATIC SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 PROFIBUS Interface Center V1.3 Page 5...
  • Page 8 PROFIBUS Interface Center SPC3 Page 6 V1.3 SPC3 Hardware Description 2003/04 Copyright (C) Siemens AG 2003. All rights reserved.

  • Page 9: Introduction

    Due to the integration of the complete PROFIBUS-DP protocol, the SPC3 decisively relieves the processor of an intelligent PROFIBUS slave. The SPC3 can be operated on the bus with a baud rate of up to 12 MBaud.

  • Page 10: Function Overview

    1.5kByte RAM that a controller operates as Dual-Port-RAM. In UART, the parallel data flow is converted into the serial data flow, or vice-versa. The SPC3 is capable of automatically identifying the baud rates (9.6 kBd - 12 MBd).

  • Page 11: Pin Description

    3 Pin Description The SPC3 has a 44-pin PQFP housing with the following signals: Signal Name In/Out Description I© Chip-Select XWR/E_Clock I© Write signal /EI_Clock for Motorola DIVIDER I© Setting the scaler factor for CLK2OUT2/4. low potential means divided through 4 XRD/R_W I©...
  • Page 12 PROFIBUS Interface Center I (CPD): I (TS): Page 10 2003/04 SPC3 CMOS with pull down TTLt Schmitt trigger V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...

  • Page 13: Memory Allocation

    4 Memory Allocation 4.1 Memory Area Distribution in the SPC3 The figure displays the division of the SPC3 1.5k internal address area. The internal latches/register are located in the first 21 addresses. The internal latches/register either come from the controller or influence the controller. Certain cells can be only read or written. The internal work cells to which the user has no access are located in RAM at the same addresses.
  • Page 14 8. internal SPC 3 RAM (1.5 kByte) Segment 0 Segment 1 Segment 2 8 Bit Segmentaddresses (Pointer to the buffers Segment 190 Segment 191 Page 12 2003/04 SPC3 V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...

  • Page 15: Processor Parameters (Latches/Register)

    4.2 Processor Parameters (Latches/Register) These cells can be either read only or written only. SPC3 carries out “address swapping” for an access to the address area 00H - 07H (word register) in the Motorola mode. That is, the SPC3 exchanges address bit 0 (generated from an even address, one uneven, and vice-versa).
  • Page 16 Figure 4.3: Assignment of the Internal Parameter Latches for WRITE Page 14 2003/04 SPC3 Significance (Write Access !) Interrupt- Controller - Register Setting parameters for individual bits Ctrl -Val Root value for baud rate monitoring MinTsdr time V1.3 SPC3 Hardware Description Copyright (C) Siemens AG 2003. All rights reserved.

  • Page 17: Organizational Parameters (Ram)

    PROFIBUS Interface Center 4.3 Organizational Parameters (RAM) The user stores the organizational parameters in RAM under the specified addresses. These parameters can be written and read. SPC3 Hardware Description V1.3 Page 15 Copyright (C) Siemens AG 2003 All rights reserved. 2003/04...
  • Page 18 Page 16 2003/04 SPC3 Bit No. Significance Set up station address of the relevant SPC3 Pointer to a RAM address which is presetted with 0FFH Based on an internal 16-bit wachdog timer, the user is monitored in the DP_Mode. Length of the 3 Dout buffers...

  • Page 19: Asic Interface

    (Intel) *) When Spec_Clear_Mode (Fail Safe Mode ) = 1 the SPC3 will accept data telegramm with a data unit=0 in the state Data Exchange. The reaction to the outputs can be parameterized f.e. in the parameterization telegram ( only available from version Step C).
  • Page 20 Special Clear Mode (Fail Safe Mode) No special clear mode. Special clear mode. SPC3 will accept datea telegramms with data unit = 0. Figure 5.1: Mode-Register 0 Bit 12 .. 0.(can be written to, can be changed in offline only)

  • Page 21: Mode Register 1 (Mode-Reg1, Writable)

    User_WD Bit 0 START_SPC3 Exiting the Offline state SPC3 exits offline and goes to passive-idle. In addition, the idle timer and Wd timer are started and ‘Go_Offline = 0’ is set. Bit 1 End of Interrupt End of Interrupt: SPC3 switches the interrupt outputs to inactive and again sets EOI to log.’0.’...

  • Page 22: Status Register

    PROFIBUS Interface Center 5.2 Status Register The status register mirrors the current SPC3 status and can be read only. Address Control Register WD_State (Intel) Address Control Register SPC3 Release (Intel) Page 20 2003/04 SPC3 Bit Position DP_State Diag_ access Flag...
  • Page 23 3..0 13,14, Release no. for SPC3 0000 = Release 0 Rest = Not possible Figure 5.3: Status Register Bit15 .. 0.(readable) SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 PROFIBUS Interface Center V1.3 Page 21 2003/04...

  • Page 24: Interrupt Controller

    Bit Position Diag_ New_ New_ Puffer_ Prm_ Cfg_ Changed Data Data V1.3 X/INT Designation Go/Leave MAC_ Int-Req-Reg Data_ Reset 7..0 Designation New_ New_GC Int-Req-Reg 7 SSA_ 15..8 Data mand SPC3 Hardware Description Copyright (C) Siemens AG 2003. All rights reserved.
  • Page 25 Bit 0 MAC_Reset After it processes the current request, the SPC3 has arrived at the offline state (through setting the ‘Go_Offline bit’ or through a RAM access violation). Bit 1 Go/Leave_DATA_EX The DP_SM has entered or exited the ‘DATA_EX’ state.
  • Page 26 Mask is deleted and the Bit = interrupt is enabled. All bits deleted Bit = The IRR bit is deleted. The IRR bit remains Bit = unchanged. V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...

  • Page 27: Watchdog Timer

    RESET and also after the watchdog (WD) timer has run out in the ‘Baud_Control_state.’ As a rule, SPC3 begins the search for the set rate with the highest baud rate. If no SD1 telegram, SD2 telegram, or SD3 telegram was received completely and without errors during the monitoring time, the search continues with the next lowest baud rate.

  • Page 28: Profibus-Dp Interface

    PROFIBUS Interface Center 6 PROFIBUS-DP Interface 6.1 DP_Buffer Structure The DP mode is enabled in the SPC3 with ‘DP_Mode = 1’ (see mode Register0). In this process, the following SAPS are fixed reserved for the DP mode: Default SAP: SAP53:...
  • Page 29 Set_Param telegram is significantly larger than for the other telegrams, it is suggested to make an Aux-Buffer2 available (Aux_Sel_Set_Param = 1) for this telegram. telegrams are then read via Aux-Buffer 1 (Aux_Sel_..=0). If the buffers are too small, SPC3 responds with “no resources”! SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved.
  • Page 30 All buffer pointers are 8-bit segment addresses, because the SPC3 internally has only 8-bit address registers. For a RAM access, SPC3 adds an 8-bit offset address to the segment address shifted by 3 bits (result: 11-bit physical address). As regards the buffer start addresses, this results in an 8-byte graunularity from this specification.

  • Page 31: Description Of The Dp Services

    SPC3 in the R_TS_Adr und R_Real_No_Add_Change RAM register. If SAP55 is enabled and the Set_Slave_Address telegram is correctly accepted, SPC3 enters all net data in the Aux-Puffer1/2, exchanges the Aux buffer1/2 for the SSA buffer, stores the entered data length in ‘R_Len_SSA_Data’, generates the ‘New_SSA_Data’...

  • Page 32: Set_Param (Sap61)

    6.2.2.1 Parameter Data Structure SPC3 evaluates the first seven data bytes (without user prm data), or the first eight data bytes (with user prm data). The first seven bytes are specified according to the standard. The eighth byte is used for SPC3- specific characteristics.

  • Page 33: Check_Config (Sap62)

    Check_Config telegram was supposed to be received in the meantime, the user receives the ‘Cfg_Conflict” signal during the acknowledgement of the first Check_Config telegram, whether positive or negative. Then the user must repeat the validation, because SPC3 has made a new Cfg buffer available. The ‘User_Cfg_Data_Okay_Cmd’ and ‘User_Cfg_Data_Not_Okay_Cmd’ acknowledgements are read accesses to defined memory cells (see Section 2.2.1) with the relevant ‘Not_Allowed’, ‘User_Cfg_Finished,’...

  • Page 34: Slave_Diagnosis (Sap60)

    6.2.4 Slave_Diagnosis (SAP60) 6.2.4.1 Diagnostics Processing Sequence Two buffers are available for diagnostics. The two buffers can have varying lengths. SPC3 always has one diagnostics buffer assigned to it, which is sent for a diagnostics call-up. The user can pre-process new diagnostics data in parallel in the other buffer.

  • Page 35: Write_Read_Data / Data_Exchange (Default_Sap)

    6.2.4.2 Structure of the Diagnostics Buffer: The user transfers the diagnostics buffer displayed in the figure below to SPC3. The first 6 bytes are space holders, except for the three least significant bit positions in the first byte. The user stores the diagnostics bits, ‘Diag.Ext_Diag’...
  • Page 36 Read_Output Telegram before the first data cycle. 6.2.5.2 Reading Inputs SPC3 sends the input data from the D buffer. Prior to sending, SPC3 fetches the Din buffer from ‘N’ to ‘D.’ If no new buffer is present in ‘N,’ there is no change.

  • Page 37: Global_Control (Sap58)

    ‘Leave_Master.’ The user must cyclically set this timer to its start value. Therefore, ‘Res_User_Wd = 1’ must be set in mode register 1. Upon receipt of the next Write_Read_Data telegram, SPC3 again loads the User_Wd_Timer to the parameterized value ‘R_User_Wd_Value Register 1).

  • Page 38: Read_Inputs (Sap56)

    6.2.8 Read_Outputs (SAP57) SPC3 fetches the output data from the Dout buffer in ‘U’. The user must preset the output data with ‘0’ during start-up so that no invalid data can be sent here. If there is a buffer change from ‘N’ to ‘U’ (through the Next_Dout_Buffer_Cmd) between the first call-up and the repetition, the new output data is sent during the repetition.

  • Page 39: Hardware Interface

    Due to the 11-bit address bus, SPC3 is no longer fully compatible to SPC2 (10-bit address bus). However, AB(10) is located on the XINTCI output of the SPC2 that was not used until now. For SPC3, the AB(10) input is provided with an internal pull-down resistor.
  • Page 40 All other HC11 types with a multiplexed bus must select addresses AB7..0 externally from DB7..0 data. The address decoder is switched off in the SPC3. The CS signal is fed to SPC3. For microcontrollers with chip select logic (K, F1, HC16, and HC916), the chip select signals are programmable as regards the address range, the priority, the polarity, and the window width in the write cycle or read cycle.

  • Page 41: Switching Diagram Principles

    A / D 7...0 Port 0 AB 15...8 Port 2 PSEN Reset EPROM 64kB SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 PROFIBUS Interface Center (0000 00XX BIN) Address Latch (0000 00XX BIN) AB 15...0 Address...
  • Page 42 DB 7...0 AB 12...1 AB 23...0 CSRAM Address CSEPROM Decoder 32kB V1.3 Clock -Generator 48 MHz 12/24 MHz Teiler :2/4 X/INT XREADY XCTS (7..0) SPC3 (10..0 SPC3 Reset Mode SPC3 Hardware Description Copyright (C) Siemens AG 2003. All rights reserved. DIVIDER...

  • Page 43: Application With The 80 C 32

    The pull up / pull down resistances in the drawing above are only relevant for a in circuit tester.The internal chip select logic is activated when the address pins A 11 .. A 15 are set to „0“ . In the example above the starting address of the SPC3 is set to 0x1000 . Processor Addreß-...

  • Page 44: Application With Th 80 C 165

    The pull up / pull down resistances in the drawing above are only relevant for a in circuit tester. Dual Port RAM Controller The internal 1.5k RAM of the SPC3 is a Single Port RAM. Due to an integrated Dual Port RAM controller, the controller, however, permits an almost simultaneous access of both ports (bus interface and microsequencer interface).

  • Page 45: Interface Signals

    („DIS_STOP_CONTROL = 1“, in mode register 0 or ‘Set_Param-Telegram’ for DP). One requirement of the PROFIBUS protocol is that no rest states are permitted between the telegram characters. The SPC3 transmitter ensures that this specification is maintained. This following start bit test is switched off with the parameter setting „DIS_START_CONTROL = 1“...

  • Page 46: Technical Data

    5,25 k.A. 0,3 V 0,3 V k.A. k.A. k.A. k.A. k.A. k.A. k.A. k.A. ST-Vers. AMI-Vers. ST-Vers. -0,5 k.A. k.A. -0,5 k.A. k.A. 0,4* k.A. 0,55** k.A. SPC3 Hardware Description Copyright (C) Siemens AG 2003. All rights reserved. Unit Unit...

  • Page 47: Ac-Specification For The Output Drivers

    Hint: The output power of the AMI-drivers is entspricht 8mA under the circumstances described in Tabel 8.3 Tabel 8.6: AC-Specifikation of the output drivers SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 AMI-Vers. ST-Vers. AMI-Vers. n.c.

  • Page 48: Timing Characteristics

    Parameter Interrupt Inactive Time (for EOI_Timebase = 0) Interrupt Inactive Time X/INT After acknowledging an interrupt with EO1, a min. of 1 us or 1 ms is expected in SPC3 before a new interrupt is output. Page 46 2003/04 SPC3 6.25...

  • Page 49: Timing In The Synchronous C32-Mode

    Reset: SPC3 requires a minimum of 400 clock pulse cycles during the reset phase so that it can be reset correctly. Reset 8.5.2 Timing in the Synchronous C32-Mode: If SPC3 is operated at 48MHz, an 80C32 with a maximum clock pulse rate of 20MHz can be connected.
  • Page 50 DB(7..0) Adressen Synchronous Intel-Mode, Processor-Write-Timing AB(7..0 ) VALID DB(7..0) Adressen Page 48 2003/04 SPC3 Data Out Data In V1.3 Copyright (C) Siemens AG 2003. All rights reserved. VALID Adressen XWR = log.'1' VALID Adressen XRD = log.'1' SPC3 Hardware Description...

  • Page 51: Timing In The Asynchronous Intel Mode (X86 Mode)

    In 80X86 operation, SPC3 acts like memory with ready logic. The access times depend on the type of accesses. The request for an access to SPC3 is generated from the negative edge of the read signal or the positive edge of the write signal.

  • Page 52: Timing In The Synchronous Motorola Mode (E_Clock-Mode, For Example, 68Hc11)

    8.5.4 Timing in the Synchronous Motorola Mode (E_Clock-Mode, for example, 68HC11) : For a CPU clockline through the SPC3, the output clock pulse (CLKOUT2/4) must be 4 times larger than the E_CLOCK. That is, a clock pulse signal must be present at the CLK input that is at least 10 times larger than the desired system clock pulse (E_CLOCK).
  • Page 53 The request for a read access to SPC3 is derived from the positive edge of the E clock (in addition: XCS = 0, R W = 1). The request for a write access is derived from the negative edge of the E clock (in addition: XCS = 0, R W = 0).

  • Page 54: Timing In The Asynchronous Motorola-Mode (For Example, 68Hc16)

    The request for an access of SPC3 is generated from the positive edge of the AS signal (in addition: XCS=´0´, R_W=´1´). The request for a write access is generated from the positive edge of the AS signal (in addition: XCS=´0´, R_W=´0´).
  • Page 55 XDSACK (early) Asynchronous Motorola-Mode, Processor-Write-Timing AB(10..0) DB(7..0) XDSACK (normal) XDSACK (early) SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 VALID Data Out VALID Data In V1.3 PROFIBUS Interface Center E_Clock = log.'0' E_Clock = log.'0' Page 53...

  • Page 56: Serial Bus Interface

    PROFIBUS Interface Center 8.5.6 Serial Bus Interface Parameter Pulse 48 MHz: to TxD Setup Time to TxD Hold Token Clock pulse cycle (48MHz) Page 54 2003/04 SPC3 Unit V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...

  • Page 57: Housing

    SPC3 PROFIBUS Interface Center 8.5.7 Housing PQFP-44 Housing SPC3 Hardware Description V1.3 Page 55 Copyright (C) Siemens AG 2003 All rights reserved. 2003/04...

  • Page 58: Processing Instructions

    SPC3 is a cracking-endangered component that must be handled as such. A drying process must be carried out before SPC3 is processed. The component must be dried at 125 o C for 24 hours and then be processed within 48 hours. This drying process may be carried out once only because the component is soldered.

  • Page 59: Profibus Interface

    9 PROFIBUS Interface 9.1 Pin Assignment The data transmission is performed in RS 485 operating mode (i.e., physical RS 485). The SPC3 is connected via the following signals to the galvanically isolated interface drivers. Signal Name Input/ Output Output Output Input The PROFIBUS interface is a 9-way, sub D, plug connector with the following pin assignment.

  • Page 60: Example For The Rs 485 Interface

    To minimize the capacity of the bus lines the user should avoid additional capacities. The typical capacity of a bus station should be 15 ... 25 pF. Page 58 2003/04 SPC3 V1.3 Copyright (C) Siemens AG 2003. All rights reserved. SPC3 Hardware Description...

  • Page 61: Appendix

    PO Box 4991 Johnson City, TN 37602-4991 Fax : (423) - 262 - 2103 Your Partner: Ron Mitchell Tel.: (423) - 262 - 2687 email: Ron.Mitchell@sea.siemens.com SPC3 Hardware Description V1.3 Page 59 Copyright (C) Siemens AG 2003 All rights reserved. 2003/04...

  • Page 62: General Definition Of Terms

    State Machine 10.3 Ordering of ASICs For Ordering SPC3 ASICs please refer to your contact person in the Siemens local branch office and use one of the ordering numbers depending on the amount you want to order. 10.3.1 SPC3 (AMI)

  • Page 63: Appendix A: Diagnostics Processing In Profibus Dp

    Bit 7 Bit 6 Bit 5-0 Header Byte Diagnostics Field Coding of diagnostics is device-specific Can be specified as required SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 Block length in bytes, including header V1.3 PROFIBUS Interface Center Page 61...
  • Page 64 Block length in bytes including header diagnostics Bit 6 Bit 5 Bit 4 - 0 Identification Number Channel Number Coding Error Type V1.3 etc. Identifier Byte 0 has diagnostics SPC3 Hardware Description Copyright (C) Siemens AG 2003. All rights reserved.

  • Page 65: Ext_Diag_Overflow

    In the type file for the COM ET200 and in the GSD [device master data] file, fields are already provided for referencing device-specific bits and pertinent plain text messages (for example, Bit 7: „I have had it; good night!“). SPC3 Hardware Description Copyright (C) Siemens AG 2003 All rights reserved. SPC3 C:PNO4..ET.200 Station4...

  • Page 66: Appendix B: Useful Information

    PROFIBUS Interface Center 12 Appendix B: Useful Information 12.1 Data format in the Siemens PLC SIMATIC The SPC3 always sends data from the beginning of the buffer till the end. 16Bit values are shown in the Motorola format. For example: Buffer pointer...
  • Page 68 Siemens AG Division Automation Engineering Combination Engineering PO Box 23 55, D-90713 Fuerth/Germany SIEMENS Aktiengesellschaft Siemens AG Subject to change without prior notice Printed in the Fed. Rep. of Germany...

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