RTSI Trigger Bus
Do not drive the same RTSI trigger bus line with the NI 78xxR and another device
simultaneously. Such signal driving can damage both devices. NI is not liable for any
damage resulting from such signal driving.
PXI Local Bus (NI PXI-781xR/783xR Only)
© National Instruments Corporation
The NI 78xxR can send and receive triggers through the RTSI trigger bus.
The RTSI bus provides eight shared trigger lines that connect to all the
devices on the bus. In PXI, the trigger lines are shared between all the PXI
slots in a bus segment. In PCI, the RTSI bus is implemented through a
ribbon cable connected to the RTSI connector on each device that needs to
access the RTSI bus.
You can use the RTSI trigger lines to synchronize the NI 78xxR to any other
device that supports RTSI triggers. On the NI PCI-781xR/783xR, the RTSI
trigger lines are labeled RTSI/TRIG<0..6> and RTSI/OSC. On the
NI PXI-78xxR, the RTSI trigger lines are labeled PXI/TRIG<0..7>.
In addition, the NI PXI-78xxR can use the PXI star trigger line to send or
receive triggers from a device plugged into Slot 2 of the PXI chassis.
The PXI star trigger line on the NI PXI-78xxR is PXI/STAR.
The NI 78xxR can configure each RTSI trigger line either as an input or an
output signal. Because each trigger line on the RTSI bus is connected in
parallel to all the other RTSI devices on the bus, only one device
should drive a particular RTSI trigger line at a time. For example, if
one NI PXI-78xxR is configured to send out a trigger pulse on PXI/TRIG0,
the remaining devices on that PXI bus segment must have PXI/TRIG0
configured as an input.
For more information on using and configuring triggers, select Help"
Search the LabVIEW Help in LabVIEW to view the LabVIEW Help.
Refer to the PXI Hardware Specification Revision 2.1 and PXI Software
Specification Revision 2.1 at
The NI PXI-781xR/783xR can communicate with other PXI devices using
the PXI local bus. The PXI local bus is a daisy-chained bus that connects
each PXI peripheral slot with its adjacent peripheral slot on either side. For
example, the right local bus lines from a PXI peripheral slot connect to the
left local bus lines of the adjacent slot on the right. Each local bus is 13 lines
wide. All of these lines connect to the FPGA on the NI PXI-781xR/783xR.
Hardware Overview of the NI 78xxR
for more information about
R Series Intelligent DAQ User Manual