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Motorola VL-RISC MCF5202 User Manual

Motorola network router - residential gateway user manual.

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THE MOTOROLA GATEWAY BOARD
(MCF5202 Microprocessor To MC68EC000 Bus Interface Card)
1.0 Introduction
The integrated Gateway circuit board will bridge an existing MC68EC000 system to the new ColdFire¨
MCF5202 VL-RISC microprocessor, to evaluate the possibility of moving toward a higher performance architecture.
It can be used to evaluate system enhancements such as on-chip instruction and/or data cache and bursting to external
memory. It can also be used to port software code to the ColdFire architecture directly in a customerÕs system as
opposed to the traditional method of porting code to an evaluation platform. This paper describes the use and opera-
tion of the Gateway board as well as technical information that can be used as a reference design.
2.0 Gateway Board Overview
2.1 Software Considerations
The principal use of this board is to help port system software code from the M68000 architecture to the Cold-
Fire architecture. Users will have to recompile the system software to target the MCF5202 instead of targeting the
M68000. Even though the system will see a hardware interface that looks like a MC68EC000, the software must con-
sist of ColdFire instructions for the MCF5202 to work properly. Refer to Section 8, ÒPorting from M68K Architec-
ture,Ó of the MCF5202 UserÕs Manual for an overview of the issues encountered when upgrading from the M68000 to
the ColdFire microprocessor. In addition, youÕll have to keep three key things in mind while porting system software
code from the MC68EC000 system to the MCF5202 system
1.
mapping 32-bit MCF5202 addresses to 24-bit 68EC000 addresses
2.
cache coherency
3.
RMW cycles
MOTOROLA
Freescale Semiconductor, Inc.
MICROPROCESSORS
Jeff Miller
October 15, 1997
GATEWAY BOARD
For More Information On This Product,
Go to: www.freescale.com
¨
1
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Summary of Contents

  • Page 1

    Freescale Semiconductor, Inc. THE MOTOROLA GATEWAY BOARD (MCF5202 Microprocessor To MC68EC000 Bus Interface Card) 1.0 Introduction The integrated Gateway circuit board will bridge an existing MC68EC000 system to the new ColdFire¨ MCF5202 VL-RISC microprocessor, to evaluate the possibility of moving toward a higher performance architecture.

  • Page 2

    ACRs and set this ACRÕs For More Information On This Product, CONTENTS CACHE CONTROL Instructions ACR0 Data ACR1 CACR GATEWAY BOARD Go to: www.freescale.com 5202 MEMORY MAP A[31:0] $01000000 $011FFFFF $02200000 $023FFFFF $03400000 $03FFFFFF MOTOROLA...

  • Page 3

    Þrst bus access of a longword write, or as many as 7 bus clocks if doing, for example, a single byte read. Table 2 and Table 3,compare all possible combinations of accesses between the MCF5202 and the MC68EC000. MOTOROLA For More Information On This Product, GATEWAY BOARD Go to: www.freescale.com...

  • Page 4

    Line Fill (4 Longs The industry standard Dhrystone 2.1 benchmark was run on the Motorola Gateway board, as well as some other systems, and the results are shown in Table 4. If you notice in Table 4, the Gateway board requires about a 7.5MHz increase in frequency (12.5MHz to 20MHz) to get about the same MIPS performance of the 68EC000 evaluation...

  • Page 5

    There is a ColdFire BDM connector (labeled J2) on the Gateway board that is a 26-pin Berg Connector arranged in two rows of thirteen pins each. This connector is commonly used by software debugger vendors to allow such features as real-time trace, real-time debug, and background debug. MOTOROLA For More Information On This Product, DRAM ACCESSES...

  • Page 6

    CLOCK R/W* TT[1:0] SIZ[1:0] AD[31:16] ADDR AD[15:0] ADDR DA*[1:0] FC[2:0] A[23:0] DTACK* D[15:8] D[7:0] For More Information On This Product, READ D[31:16] ADDR ADDR READ D[31:24] READ D[23:16] GATEWAY BOARD Go to: www.freescale.com READ D[15:0] READ D[15:8] READ D[7:0] MOTOROLA...

  • Page 7

    CLOCK R/W* TT[1:0] SIZ[1:0] AD[31:16] ADDR WRITE D[31:16] AD[15:0] ADDR DA*[1:0] FC[2:0] A[23:0] DTACK* D[15:8] WRITE D[31:24] D[7:0] WRITE D[23:16] MOTOROLA For More Information On This Product, ADDR WRITE D[15:0] ADDR WRITE D[15:8] WRITE D[7:0] GATEWAY BOARD Go to: www.freescale.com...

  • Page 8

    A[23:4] A[3:1] IPL LEVEL DTACK* D[15:8] D[7:0] IACK CYCLE (VECTOR NUMBER ACQUISITION) Figure 3: Interrupt-Acknowledge Operation VECTOR LEVEL 01 or IPL LEVEL VECTOR GATEWAY BOARD For More Information On This Product, Go to: www.freescale.com 01 or IACK CYCLE (AUTOVECTORED) MOTOROLA...

  • Page 9

    'LOCK ATM pLSI property 'LOCK BR68K "pLSI property 'LOCK SDO pLSI property 'LOCK SIZ1 pLSI property 'LOCK BDCF "pLSI property 'LOCK SCLK "pLSI property 'LOCK RSTI MOTOROLA For More Information On This Product, Reset Wait Grant to beginning ColdFire...

  • Page 10

    ISPMODE - only used for in-circuit programming of PLD "AD0 (unlatched) "Dedicated IN3 - 0=8-bit, 1=16-bit "nDTACK "nTS "Addr Enable for NORM Op - AENORM=0=HIZ, AENORM=1=output "Addr Enable for IACK Op - AEIACK=0=HIZ, AEIACK=1=output GATEWAY BOARD Go to: www.freescale.com MOTOROLA...

  • Page 11

    "Initializations psreg.clk = PCLK; psreg.ar = RSTI; A0.clk = TS; "AD0 is latched when TS is asserted MOTOROLA For More Information On This Product, "nBG68K "nBGCF "(!nLE16_8) - 0=transparent latches, L-2-H=latches data "nOEBA8 =0=HIZ, 1=output from B (TDAT) to A (AD) "nOEAB8 =0=HIZ, 1=output from A (AD)

  • Page 12

    For More Information On This Product, "PS5 & 16-bit "PS5 & !16-bit "PS5 & NCLK "(CF is master & not halted) & !(IACK-Access) "(CF is master & not halted) & (IACK-Access) "(CF is master & not halted) GATEWAY BOARD Go to: www.freescale.com MOTOROLA...

  • Page 13

    BG68K=0; IF BR68K THEN BS1; ELSE BS0; MOTOROLA For More Information On This Product, "RESET and waiting for TS to de-assert "Wait for TS to de-assert "Waiting for TS to assert, Beginning of ColdFire cycle "Waiting for TS to assert "Beginning of 68K cycle, assert FCÕs and Address...

  • Page 14

    Emulator Access CPU Space or IACK AEIACK OExxxx Notes OEBA16 Read,16-bit,even,byte,Normal OEBA8 Read,16-bit,even,byte,IACK OEBA16 Read,16-bit,even,!byte OEBA16 Read,16-bit,odd, byte OEBA16 Read,16-bit,odd,!byte (N/A) OEBA8 Read,8-bit OEAB16 Write,16-bit,even,byte OEAB16 Write,16-bit,even,!byte OEAB16 Write,16-bit,odd,byte OEAB16 Write,16-bit,odd,!byte (N/A) OEAB8 Write,8-bit GATEWAY BOARD Go to: www.freescale.com MOTOROLA...

  • Page 15

    Figure 5: Gateway Board Block Diagram ColdFire MCF5202 10.0 Gateway Board Physical Layout Figure 6: Physical Layout (Actual Size ) Component Side 2 in. MOTOROLA For More Information On This Product, 68EC000 Connector (68-pin PLCC) Solder Side GATEWAY BOARD Go to: www.freescale.com...

  • Page 16

    Freescale Semiconductor, Inc. 11.0 Gateway Board Bill Of Material ITEM MANUFACTURER Motorola XCF5202PU33A Lattice ISPLSI1016-90LT44 Motorola MC74F573DW Motorola MC74F543DW Venkel CR1206-8W-103JT Venkel CR1206-8W-472JT Samtec TMS-117-55-G-S 1-103783-3 1-87499-3 Samwa CS3216X7R103K500R Venkel C1206X7R500-103KNE Panasonic S1012-36-ND Samwa CS3216X7R104K500R Venkel C1206X7R500-104KNE Samwa CS3216COG100K500R Venkel...

  • Page 17

    A/D26 AD27 A/D27 AD28 A/D28 AD29 A/D29 AD30 A/D30 AD31 A/D31 4.7K nRST nBGCF nTEA nIPL0 BKPT MOTOROLA For More Information On This Product, 74F573 AEUPPER ADLT AD16 AD17 SIZ0 AD18 SIZ1 AD19 AD20 AD21 AD22 AD23 nDA0 nDA1 74F573...

  • Page 18

    AD27 nOEBA16 AD28 nOEAB8 AD29 nOEBA8 AD30 AD31 GATEWAY BOARD Go to: www.freescale.com J1 / D EC000 CONN 74F543 OEAB nOEBA16 OEBA LEAB nLE16_8 LEBA 74F543 OEAB nOEBA16 OEBA LEAB nLE16_8 LEBA 74F543 OEAB nOEBA8 OEBA LEAB nLE16_8 LEBA MOTOROLA...

  • Page 19

    Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and speciÞcally disclaims any and all liability, including without limitation consequential or incidental damages.

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