Mitsubishi Electric WS-48513 Troubleshooting Manual

Technical training & troubleshooting manual

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Service manual (86 pages)

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Page 1 Projection Television Technical Training & Troubleshooting Manual WS-48513 WS-48613 WS-65713 WS-55813 WS-55513 WS-55613 WS-73713 WS-65813 WS-65513 WS-65613 WS-73513 MITSUBISHI ELECTRIC MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC. V23+ V23++ V23+++ ECHNICAL RAINING 2003...
Page 5: Table Of Contents
TECHNICAL TRAINING AND TROUBLESHOOTING MANUAL Introduction ... New Technologies Models ... 1 Features ... 2 NetCommand™ 3.0 ... 3 Five Format Memory Card Reader ... 4 PerfectColor™ ... 5 MonitorLink™ ... 6 Service Code Chart ... 12 Chapter1 ... Disassembly and Service Disassembly Procedures ...
Page 6 Chapter 5 ... Video/Color Circuitry Overall Block Diagram ... 5-1 PCB-Terminal ... 5-2 PCB-Signal ... 5-3 RGB CRT Drive & Protect Circuitry ... 5-4 Digital Signal Path ... 5-5 Monitor Out ... 5-6 Chapter 6 ... Sync, Deflection and High Voltage Overall Block Diagram ...
Page 7: Introduction
• 2 Piece Cabinets (65" & 73") • Fine Pitch Lenticular Screen • Anti-glare DiamondShield Introduction Gold Gold Plus Platinum V23+ WS-48513 WS-48613 WS-55513 WS-55613 WS-65513 WS-65613 WS-65713 WS-65813 WS-73513 WS-73713 Table 1: V23 Models Improved Features • 3rd Generation HDTV Receiver •...
Page 8: Five Format Memory Card Reader
Feature 3rd Generation HDTV Receiver NetCommand™ 3.0 Five-Format Memory Card Reader AMVP (Advanced Multimedia Video Processor) FireWire/IEEE1394 DTV-LINK PerfectColor™ Low Energy Mode MonitorLink™ Input VGA Input QuadField Focus™ Two-way Coaxial Speakers Tru-Focus™ Lenses Two-way Speaker System Gold Plated Jacks Contemporary Cabinet Fine-Pitch Lenticular Screen Anti-glare DiamondShield™...
Page 9 NetCommand 3.0 NetCommand allows most common home theater products to be connected and controlled by way of the TV's re- mote control by simply selecting on- screen icons. See Figure 1. The control interface can be by one of two means. •...
Page 10 5 Format Memory Card Reader Digital music and photography can now be enjoyed in the home theater environment thanks to the memory card reader featured in the V23 chassis. When the user inserts a memory card into any one of the four card reader slots on the front of the set, NetCommand will take control, allowing a slide show or giving a music play list.
Page 11: Perfectcolor
Compatibility Users having difficulties with the memory card reader should be aware of the following requirements: For JPEG Pictures up to 128mb: 1. Still images recorded using the Exchangable Image File Format (EXIF) for digital still cam- eras and Design Rules for Camera File Sys- tems (DCF).
Page 12: Monitorlink
MonitorLink™ MonitorLink is a new digital interface introduced in Mitsubishi's 2003-2004 model line, including the V23 chassis. MonitorLink provides a proprietary connection for Mitsubishi's HD-5000, Monitor/Receiver, allowing Mitsubishi's upgradeability promise to be fulfilled using a digital, rather than analog, interface. While MonitorLink is a proprietary connection, it uses industry standard technologies that may pro- vide even more versatility.
Page 13 Display Data Channel DDWG Digital Display Working Group DMPM Digital Monitor Power Management DVI-A Digital Visual Interface - Analog DVI-D Digital Visual Interface - Digital DVI-I Digital Visual Interface - Integrated (Digital or Analog) EDID Extended Display Identification Data HDCP High-bandwidth Digital Content Protection TMDS Transistion Minimized Differential Signaling...
Page 14 Display Data Channel (DDC) The VESA standard Display Data Channel, shown in Figure 10, is part of the DVI specification. It is an I C bus used for data communications between the two devices. The data can include information specifying the type of display device connected and can also be used to support copy protection.
Page 15 High-bandwidth Digital Content Protection (HDCP) HDCP is a system designed to protect the outputs of a DVI device from being copied. The protection can be applied in various ways. • Unrestricted copies • Limited number of copies • Limited use of copies •...
Page 16 1 TMDS Data 2- 2 TMDS Data 2+ 3 TMDS 2&4 Shield 4 TMDS Data 4- (NA) 5 TMDS Data 4+ (NA) 6 DDC Clock 7 DDC Data 8 Analog Vertical Sync (NA) 23 TMDS Clock+ 9 TMDS Data 1- 10 TMDS Data 1+ 11 TMDS 1&3 Shield 12 TMDS Data 3- (NA)
Page 17 Figure 13: V23 Chassis DVI Input Block Diagram...
Page 18 Chassis Option Menu Adjustment Mode Convergence Mode VZ5/VZ6/V15 1-3-7-0 VZ7/VZ8/V16 1-2-7-0 8-2-7-0 VZ9/V18/V19 0-1-7-0 V20/VK20 2-2-7-0 2-1-7-0 K20/V22/V23 0-3-7-0 Service Menu Access Codes 2-3-5-7 2-3-5-9 <6><5><4> 1-2-5-7 1-2-5-9 <6><5><4> 8-2-5-7 8-2-5-9 <6><5><4> 0-1-5-7 0-1-5-9 <6><5><4> 2-2-5-7 2-2-5-9 <6><5><4> 2-1-5-7 2-1-5-9 <6><5><4> 0-3-5-7 0-3-5-9 <6><5><4>...
Page 19: Chapter1
Disassembly and Service With 11 different models, mechanical features and disassembly procedures vary in the V23. Since all features and disassembly procedures are in the Ser- vice Manual, this chapter will only provide a gen- eral discussion. The V23 has the following mechanical features: •...
Page 20: Dm Replacement
The lightbox removal procedure for 48” V23 mod- els is shown in Figure 1-1. 1. Remove the Back Board by removing 7 screws (a), 2 screws (b) and 8 screws (c). 2. Remove the Back Cover by removing 8 screws (d). 3 Remove 4 screws (e) to remove the Board Slide.
Page 21 Figure 1-2: Main Chassis Removal REAR VIEW TOP VIEW TOP VIEW Step 1 Step 2 Step 3 Figure 1-3: DM Replacement...
Page 22 Figure 1-4: PCB Locations Figure 1-5: Main Component Locations...
Page 23: Convergence Output Ic Replacement
PCB-DTV Tuner IR Learning NetCommand DM Interface IEEE1394 DTV Tuner Card Viewer & Demodulator OSD-Menus Interface Digital uPC Control PCB-Doubler PCB-SVM PIP-POP Scan Velocity Picture Format Modulation 3:2 Pull Down (Picture Edge Line Double Enhancement) 480i to 480p PCB & Major Component Locations PCB and major component locations are shown in Figures 1-4 and 1-5.
Page 24: Composite Cabinet
V23+++ Composite Cabinet Back The WS-55813 and WS-65813 feature a unique cabi- net similar to last year’s WS-65712. It has a com- posite cabinet back that offers several advantages. • Rounded edges in the back have a modern appearance. • Unit construction gives it high strength. •...
Page 25: Initial Setup
Alignment Procedures With the exception of the Service Menu access codes, the general alignment procedures for the V23 chas- sis remains the same as previous HD chassis. A chart showing all recent Service Menu Access Codes is provided on page 12 of the Introduction. This chap- ter will give an overview of the following alignment procedures.
Page 26 SETUP Edit Setup Review Antenna A (v) Enabled Day (v) Enabled Antenna B (v) Enabled Input DTV Input 1 (v) Enabled Input 2 (v) Enabled (v) Enabled Input 3 Component 1 (v) Enabled Component 2 (v) Enabled (v) Enabled Antenna DTV (v) Enabled MonLink (v) Enabled...
Page 27: Circuit Adjustment Mode
Circuit Adjustment Mode Most of the adjustments can only be performed us- ing the remote hand unit. See Figure 2-2. Many of the adjustments must be performed in both the 480i and 1080i modes. Video/Color adjustments must be performed in the 480i and 1080i modes, and data must be preset in the 480P (DVD) and VGA modes.
Page 28 Selection of adjustment Functions and Adjustment Items To select an adjustment item in the circuit adjustment mode, first select the adjustment function that includes the specific adjust- ment item to be selected. Then select the adjustment item. Refer to the following pages for the listing of adjustment functions and adjustment items.
Page 29: Convergenceadjustment Mode
Convergence Adjustment Mode The Convergence mode is used to perform raster ge- ometry correction and convergence adjustments. These adjustments must be made in both the SD (NTSC 480i) and HD (1080i) modes. Note: Before activating the Convergence mode, turn “Video Mute” Off. The internal crosshatch pattern will not be displayed with “Video Mute”...
Page 30: Alignment Data Storage Locations
1) Use AUDIO button to select a Sub Function 2) Use the VIDEO button to select an Adjustment Item. 3) Use the ADJUST buttons to change data. FINE CONV (Press 4) This mode is used to perform Fine Raster Correction, and Fine Red and Blue Conver- gence Adjustments.
Page 31: Chapter 3
From the above diagram, it is apparent that the V23 Chassis has four Power Supply Operational Modes. 1) Low Energy Mode 2) Standard Standby Supply Mode. 3) Time Shift Recording Mode. 4) Conventional PTV On Mode. Low Energy Mode When the Low Energy Mode is activated the TV uses less than 3 Watts while the set is Off.
Page 32 A 132 kHz internal Oscillator drives an internal Output FET. The signal from the FET at pin 5 of IC9A10, drives transformer T9A10. Signal from pin 10 of T9A10 is rectified, generating the 9VS supply. The signal from pin 2 of the transformer is rectified and takes two paths: 1) To pin 1 of IC9A10, adding to an internally generated 6.3V supply.
Page 33 Low Energy Power Distribution Figure 3-4 shows the Low Energy Mode Power Dis- tribution. As stated earlier, the Low Energy 9VS is the source for the 5VS, 3.3V-ES and 3.3VS-1. The 5VS and 3.3VS-1 supplies power to the IC7A00 the PTV Control µPC.
Page 34: Standard Standby Power Supply
Standard Standby Supply The Standard Standby Regulator circuit is shown in Fig- ure 3-5. Start-up The Start-up Voltage Supply is from R9A18 in the Low Energy Mode circuit, refer to Figure 3-2. The SUB- POWER command from the Control Circuitry activates the Standby Supply.
Page 35: Time Shift Recording Power Supply
Standard Standby Supplies Two Standby supplies are generated directly from T9A20, 12VS and 6VS. Both of these supplies are directed to the DM module, and are denoted as 12V- DM and 6V-DM. A 30VS supply is derived from the 12VS source using voltage doubler circuitry, comprised of D9A31, D9A32, C9A32 and C9A27.
Page 36 When PON-1 goes High, Q9A21 turns Off, allowing Q9A20 to turn On. With Q9A20 conducting, the 12V supply is generated from the 12VS supply. The 12V supply enables IC9A22 and the 5V-1 supply is gener- ated. Time Shift Supply Power Distribution Figure 3-8 illustrates the Power Distribution for the Time Shift supplies.
Page 37: Switched Supplies
gence Generator, 3DYC and Signal Select circuitry, and to IC2E65. IC2E65 generates 2.5 Volts for 3DYC. The 12V supply provides power for Tuners and CRT Protect circuitry. It also is the source of four additional DC Supplies: • 9V-1 for the Signal Select circuitry •...
Page 38: Troubleshooting
the oscillator drive to the FET. The PWM is automati- cally changed to maintain a constant 110V source. Five supplies are directly generated by signal from T9A50, 210V, 110V, 17V, +24V and -24V. Power Distributions Figure 3-10 shows the Switched Supplies Power Dis- tribution.
Page 39 If the LED does not flash: • Check that the DM board is seated properly. • Check that there is Standby 9VS (Fig. 3-2). • Check that the SUB-POWER command line does not go High (Fig. 3-5). • Chirping sound - check the Standby Regulator, IC9A20 (Fig.3-5).
Page 40 3-10...
Page 41: Chapter 4
As in the two earlier integrated HDTV chassis, V19 and V21, the V23 uses two Microprocessors in the Control circuitry. 1) TV µPC … controlling the analog circuitry. 2) DM µPC … controlling the digital circuitry. The two µPCs constantly communicate with each other. User commands are input to the TV µPC.
Page 42: Reset Circuitry
we are not showing the details of the DM circuitry. Fig- ure 4-1 shows only the DC supplies and Reset signal going to the DM module. Reset Circuitry Figure 4-2 illustrates the Reset circuitry in more detail. The normal and Reset logic are shown in the diagram. IC7C70 is the Reset IC.
Page 43: Input Command Circuitry
Both the µPCs have the ability to reset each other if communication is lost. IC7C30 serves as a Reset inter- face between the two µPCs and the front panel Reset button. If the TV µPC gets no response from the DM, it outputs a High at pin 73 of IC7A00.
Page 44 IR signals from a Mitsubishi Remote are directed to the RMC input of IC7A00. The signals are filtered, pro- cessed and directed over the IR-IN-BUSY line to the SYS-5 µPC on PCB-DTV TUNER. If the SYS-5 cir- cuitry is busy, it holds the IR-IN-BUSY line Low until it is clear to receive data.
Page 45: Serial Data Lines
Note that the output of the Wide Band Preamp (IR-IN) is also directed to the SYS-5 µPC. This connection was not used in the V19 and V21. It enables the Learn- ing feature. The signals from the units Remote are memo- rized by the SYS-5 circuitry.
Page 46 SHORT Detect The short Detect circuitry is shown in Figure 4-6 and is the same as in the V19 and V21 chassis. If a short occurs in the + or – 24V supplies, pin 46 on IC7A00 goes Low indicating a short and the TV shuts Off. With -24V shorted, the 12VS supply turns Q9A53 On, pull- ing the SHORT line Low.
Page 47: Parallel Outputs
Additional IC7A00 Outputs Pin # BLNK-CRT DEFL-MUTE MUTE SUB MUTE SPKR POWERGOOD MUTE MON SUB POWER Parallel Outputs Most of the parallel outputs are listed in Table 4-2. Most of them have been used before and need no explana- tion. However, the function of two items should be de- scribed.
Page 48 The PerfectColor feature is performed in the Doubler circuit, therefore all signal sources must pass through the Doubler. With DM signal sources, any OSD is al- ready inserted in the signal before it goes to the Dou- bler. The PerfectColor circuitry can cause incorrect color in the OSD.
Page 49: Chapter 5
Video/Color Circuitry The above block diagram illustrates the Video/Color circuitry in the V23 chassis. Although initially it looks the same as in the V21, there are differences. The A/V Switch circuitry still selects main and sub picture signals from NTSC signal sources. Although it’s not apparent from the Block Diagram, the NTSC Decoders, Com- ponent Switch ICs, and the Doubler circuitry are differ- ent.
Page 50: Pcb-Terminal
PCB-TERMINAL Video Path Figure 5-1 illustrates the Video Signal Path on the PCB- TERMINAL. The AV-Switch circuitry has not changed, IC2L00 and IC2K00 are the same ICs used in the V21 chassis. The 3DYC Motion Adaptive Come Filter provides a clean separation of luminance (Y) and chroma (C) sig- nals.
Page 51: Pcb-Signal
The Sub picture signals from IC2B00 are directed to IC2G00, the Sub Decoder. Switch circuitry in IC2G00 selects Sub picture signals from IC2B00 or the AV- SW(2), IC2K00. As in previous chassis, the main and sub selected YPbPr signal are direct to the PCB-SIGNAL. PCB-SIGNAL Video Path Figure 5-2 shows the PCB-SIGNAL Video Signal Path.
Page 52 The outputs of the Doubler circuit, ASIC-Y, ASIC-Pb and ASIC-Pr are directed to the VCJ. The signals are processed in the VCJ and CRT RGB drive signals are output at pins 64, 63, and 62. CRT Drive & Protect Circuitry Figure 5-3 shows the CRT Drive circuitry.
Page 53: Digital Signal Path
Digital Signal Path The basic Digital Signal path was shown in Figure 5-2. Figure 5-4 shows the Digital Path in more detail. Digi- tal signal sources are the DTV/AQM Tuner, 1394 In- puts and the front panel Card Reader. There are two 1394 inputs at the rear of the DM module.
Page 54: Monitor Out
Monitor Out Circuit Figure 5-5 shows that the Monitor Output signal source is limited to an NTSC source, or the DM Module. The NTSC Y and C signals from the 3DYC Comb Filter, are directed back to IC2L00. IC2L00 directs the sig- nals to the monitor Inputs of IC2K00.
Page 55: Chapter 6
Sync, Deflection & High Voltage The Overall Sync, Deflection and Hign Voltage cir- cuitry in the V23 is shown in the Block Diagram at the top of the page. The V23 can display either of two scanning formats, 480p or 1080i. The horizon- tal scanning frequency for 480p is 31.5 kHz, and 1080i is 33.75 kHz.
Page 56: Sync Signal Path
Sync Signal Path Figure 6-1 illustrates the Sync Signal Path for the Main Picture signals on the PCB-Terminal. IC2K00, IC2A00, IC2B00 and IC2A95 comprise the Main Picture Sync Select Circuitry. Sync must be extracted from NTSC, Composite and Component Format Y Signals.
Page 57 Figure 6-2 illustrates the Sub Sync Signal Path for the Sub-Picture signals on the PCB-Terminal. It functions the same as the Main Sync Signal Path using different pin sets on the same ICs. The sub sync signals are used by Doubler circuitry for POP/ PIP signal processing.
Page 58 From the flip-flops, sync pulses are directed to the VCJ, IC2V01. Both Horizontal and Vertical Drive Generators are in the VCJ. Horizontal drive is out- put at pin 40, and vertical drive is output at pins 52 and 53. The signals are directed to their respective output circuitry on the PCB-MAIN.
Page 59: Vertical Deflection
Vertical Deflection Figure 6-4 shows the Vertical Deflection circuitry. The Vertical Deflection Generator in the VCJ out- puts push-pull type of vertical deflection drive sig- nal. +VDR at pin 53 and –VDR atz pin 52. Both signals are applied to the Vertical Output IC, IC4B01. The amplified output from IC4B01 is directed to the vertical coils in the Deflection Yokes.
Page 60 Horizontal Deflection DC Supply Circuitry The DC supplies for Q5A32 and Q5A31 are derived from Horizontal Deflection DC Supply circuitry. The 31K line from the Control µPC controls the DC volt- age for Q5A31. Q5A31 supply voltage is approxi- mately 10 volts higher for the 33.75 kHz scan for- mat (1080i), than that for the 31.5 kHz scan (480p), The H-Deflection DC Supply circuitry is also used •...
Page 61: Deflection Loss Detection
The DEFL-MUTE line from the µPC and Q5A08 reduce the DC supply during scan frequency change by the same method. The DC supply for the Horizontal Drive transistor, Q5A32, is derived from the Horizontal Output DC supply through R5A36, R5A37 and Q5A34. In the 31.5 kHz mode, the DC supply for Q5A32 would drop, since the supply for Q5A31 decreases.
Page 62 HV & HV Regulation Figure 6-8 illustrates the HV and HV Regulation cir- cuitry. Drive from the Horizontal Deflection Out- put circuitry is applied the HD-IN input of IC5A00. IC5A00 amplifies the signal which is output at pin 1, and through Q5A07 and Q5A09, is applied to the gate of Q5A51.
Page 63: X-Ray Protect
DO NOT measure the HV-DC-FB voltage at pin 13 of the T5A51. The meter may load down the inter- nal resistive divider, resulting in excessive HV. X-Ray Protect X-Ray Protect circuitry is the basically the same as in previous models, as shown in Figure 5. The X- Ray Protect circuit in the V20 monitors three items: 1) Q5A51 (HV Output) current, by monitoring Q5A51 source voltage.
Page 64 Q5A20 and its associated circuitry comprise an Arc Protect circuit. If a CRT Arcs this circuitry immedi- ately removes HV Drive. If X-Ray Protect shuts the TV Off, pressing the Power button will turn the TV back On (it may shut Off again if the problem still exists).
Page 65: Chapter 7
Convergence Circuitry Figure 7-1: Convergence Circuitry - Overall Block Diagram The Overall Block Diagram in Figure 7-1 shows the the V23 Convergence Circuitry.. A Waveform Gen- erator generates the convergence correction signals timed from horizontal and vertical sync pulses. The correction signals from the Waveform Generator are in a serial digital format.
Page 66: Waveform Generator And D/A Converter
Figure 7-2: Convergence Waveform Generator & D/A Converter Waveform Generator & D/A Converter Figure 7-2 illustrates the Convergence Waveform Generator and Digital/Analog Converter circuitry. Horizontal Sync from the doubler circuitry is applied to pin 34 of IC8D00. Vertical Sync is applied to pin 27.
Page 67 Figure 7-3: Low Pass Filter and Summing Amplifiers LPF & Summing Amps Figure 7-3 illustrates the LPF and Summing Ampli- fiers. The circuitry consists of three ICs, IC8E00, IC8E01 and IC8E02. Each correction signal from IC8D00 goes through two stages of amplification: 1) The first stage is part of the LPF.
Page 68: Convergence Output Circuitry
Convergence Output Circuitry Figure 7-4 shows the Convergence Output circuitry located on the PCB-Power. The correction signals Figure 7-4: Convergence Output Circuitry are amplified and directed to the Sub Vertical and Sub Horizontal coils located within their respective red, green and blue Deflection Yokes.
Page 69: Chapter 8
Figure 8-1: Sound Circuitry - Overall Block Diagram The V23 Sound Circuitry is shown above in the Over- all Block Diagram, Figure 8-1. The Sound Source Select circuitry selects the sound source for both the main and sub pictures. The sources correspond to the Video Inputs: •...
Page 70 Figure 8-2: Overall Sound Circuitry Block Diagram...
Page 71: Signal Path
Overall Sound Signal Path Figure 8-2 illustrates the Overall Sound Circuitry Block Diagram. The AV/SW ICs, IC2L00 and IC2K00, used to select Main and Sub Picture Video/ Color are also used to the select the Sound sources. IC2L00 selects Main and Sub sound sources from the Main Tuner (decoded by MCS circuitry in IC3A01), Sub Tuner, External NTSC Inputs 1-3 and from Component Inputs 1 and 2.
Page 73: Using The Front Panel Led
Troubleshooting Tips LED Indications Fast Blink for 70 sec. Fast Blink for 70 sec. Fast Blink (Doesn't stop) Slow Blink Use the following tips when troubleshooting the source of a problem in the V23 chassis. Using The Front Panel LED The Front Panel LED helps isolate the cause of the following problems.
Page 74 DM Module Check When the TV turns On, but a problem exists that may be caused by the DM Module, perform the following two checks: 1) Select the DTV Antenna as the source an select and HD Channel. 2) Select an analog 480i signal as the source and note if an On Screen Display (OSD) is present.

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Mitsubishi Electric WS-48513 Troubleshooting Manual

Introduction

Chapter1

Chapter 2

Chapter 3

Chapter 4

Chapter 5

Chapter 6

Chapter 7

Chapter 8

Chapter 9

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